Rca Inc.

General Electric Company

James M Walter

Robert A Dischert

Warren H Moles

Robert N Hurst, Jr

Robert E Flory

Krishnamurthy Jonnalagadda

Roland N Rhodes

David L Jose

Robert C Dennison

Extended definition television (EDTV) signals including a compatible composite wideband signal and a separate helper or extended definition signal are combined, for example, for recording purposes, using frequency multiplexing techniques. The helper signal is applied to a modulator, which produces a suppressed carrier modulated signal, to frequency shift the helper signal to a spectral band above the frequency band occupied by the compatible composite wideband signal. The frequency shifted and wideband signal are then added to form the combined signal.

EDTV recording apparatus

A wide aspect ratio television system includes memories for storing and recovering a video input signal in response to read and write clock pulses, respectively. Write clock pulses are deleted to compress edge regions of a wide aspect ratio input signal and read clock pulses are deleted to restore the signal to its original aspect ratio. The pattern of delected pulses is altered on a line-by-line basis to reduce visible artifacts of signal decimation. Dual mode receivers include provisions for controlling edge blanking, interpolation and the pattern of clock pulses deleted as a function of received signals. Wide and standard aspect ratio images are displayed without altering the width of the display raster.

Compatible wide screen television system with image compressor/expander

Apparatus for identifying a plurality of given elements read out of an array of elements arranged in lines and columns is described. The apparatus includes a line-rate counter for developing addressing signals and a memory for providing data signals corresponding to the column location of the given elements in response to the addressing signals. A programmable counter counts columns in response to the data signals read out of the memory for providing a signal which corresponds in time to read out of respective ones of the plurality of given elements.

Pixel addressing system

A video signal is serially enclosed for transmission in PCM form during synchronizing level intervals and encoded in a run length limited NRZ form during non-synchronizing level intervals, each PCM word being selected from minimum and maximum disallowed states of the NRZ code. In a decoder, a first detector responds only to the presence of the PCM code for synchronizing a second detector with response to both the NRZ and PCM coded portions of the encoded video signal to provide a decoded video output signal whereby the PCM portion of the signal conveys both decoder timing information and information as to a specific level of the video signal.

Digital video transmission system

A high speed multiplier, such as for video signals features cascaded ROMs. Each ROM is divided into pages, and each page contains different multiplying coefficients. Different significant bits of a control signal are applied to each ROM to select a page for processing the video signal.

Multiplier for digital video signals using a cascade of

In a television time-base corrector or synchronizer using a coherent memory, the input signal is written into predetermined memory addresses in order of their arrival after sampling begins for each horizontal line. The sampling occurs at a rate established by the chroma subcarrier. Sampling begins at a zero crossing of the subcarrier following a fixed interval after the horizontal synchronizing signal. Since the burst does not occur at a predetermined time after the horizontal synchronizing signal, the phase of the burst at a fixed interval after the horizontal synchronizing signal may vary when the source of the television signal changes, and this may result in horizontal displacement of the video on playback. In order to reduce the magnitude of the displacement, the zero-crossing detector operates on either positive or negative-going zero crossings. A phase ambiguity is thereby introduced which may result in color reversal. The ambiguity is resolved with a phase sensor coupled to the zero-crossing detector and a chroma inverter responsive to the phase sensor for inverting the delayed chroma relative to the reference subcarrier.

Synchronizing system with chroma parity detection

Separate durations of acceleration and constant velocity are utilized to attain phase locking between a recorded sync signal and an external reference sync signal while accelerating a recorded medium from an intermediate velocity to its operational velocity, with each duration being proportional to the intermediate velocity.

Rapid synchronization of information on separate recorded mediums

A clock generator is provided which demodulates the burst subcarrier portion of a video signal containing time base errors. The demodulation is with respect to an external subcarrier reference signal so that the demodulator output represents an accurate vector summation of the instantaneous phase and amplitude difference of the incoming video signal relative to the external reference. The demodulator output is utilized to remodulate the external reference signal to provide a rephased subcarrier reference signal which is frequency multiplied and waveshaped to produce a clock signal which is synchronized to the incoming video signal.

Clock generator for video signal processing

A synchronizing system separates the synchronizing components from a composite video signal into signal components representing horizontal sync and color burst. The leading edge of the horizontal sync component is used to develop a timing signal which is compared with the positive and negative averaged burst signal from a band pass filter tuned to the burst frequency. Comparators drive respective flip-flops arranged to provide both negative and positive burst signal outputs at a selected burst signal crossover near the end of the original burst signal. A gate circuit coupled to the flip-flop output terminals develops a line start signal which contains the leading edge of the incoming signal sync information corrected to a selected color burst. The synchronizing circuit also provides a substitute signal in the absence of the color burst component to maintain system synchronization.

Growing community of inventors

Columbus, NJ, United States of America

James M Walter