Hewlett-packard Development Company, L.p.

Hewlett Packard Enterprise Development LP

James M Hull

Dale Calvin Morris

Jonathan Kent Ross

Peter Markstein

Allan Douglas Knies

Kevin W Rudd

Elizabeth Jane Dall

An example system for driver-to-driver communication can include a first driver located on a first network device and including a transmit data mover (XDM) to send a preformatted message over a fabric interconnect to a second driver located on a second network device. The example system can also include the second driver located on the second network device and including a receive data mover (RDM) to receive the preformatted message, generate an interrupt responsive to receipt of the preformatted message, and route the interrupt to the second driver. The second driver can read the preformatted message responsive to receipt of the interrupt.

Driver-to-driver communication

A data processor includes a redirection dynamic address redirection table (DART) for redirecting instruction fetches from an original memory location with an original address to a target memory location with a target address.

In-processor dynamic address redirection table for substituting instruction strings

A secure promotion mechanism promotes a current privilege level of a processor in a computer system. The current privilege level controls application instruction execution in the computer system by controlling accessibility to system resources. An operating system performs a privilege promotion instruction, which is stored in a first page of memory not writeable by an application instructions at a first privilege level. The privilege promotion instruction reads a stored previous privilege level state, compares the read previous privilege level state to the current privilege level, and if the previous privilege level state is equal to or less privileged than the current privilege level, promotes the current privilege level to a second privilege level which is higher than the first privilege level.

Privilege promotion based on check of previous privilege level

A method and system is used to determine the correct rounding of a floating point function. The method involves performing the floating point function to a higher precision than required and examining the portion of extra precision in the result known as the discriminant. If a critical pattern is found in the discriminant, this indicates that standard rounding may give an incorrect result and further calculation is needed. The method can work for various rounding modes and types of floating point representations. The method can be implemented in a system as part of a processor instruction set or any combination of hardware, microcode, and software.

Method and system for determining the correct rounding of a function

A processor comprising a feature indicator associated with at least one of a first sequence of one or more instructions, a first register, a second register, and an execution core is provided. The execution core is configured to execute a second instruction to cause the first register to be set to a first value using the feature indicator and to cause the second register to be set to a second value using the feature indicator. The execution core is configured to execute the first sequence of one or more instructions to cause a function to be performed in response to the first value in the first register indicating a true condition, and the execution core is configured to execute a second sequence of one or more instructions to cause the function to be performed in response to the second value in the second register indicating the true condition.

System and method for adding an instruction to an instruction set architecture

Integer multiply operations using data stored in an integer register file are performed using multi-media primitive instructions that operate on smaller operands. The present invention performs a multiply operation on a 32-bit or 64-bit value by performing multiply operations on a series of smaller operands to form partial products, and adding the partial products together. Data manipulation instructions are used to reposition 16-bit segments of the 32-bit operands into positions that allow the multi-media parallel multiply instructions to compute partial products, and the partial products are then added together to form the result. In every embodiment, the present invention achieves better latencies than the prior art method of performing integer multiply operations provided by the IA-64 architecture.

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Saratoga, CA, United States of America

James M Hull