Texas Instruments Corporation

Hughes Aircraft Company

Delco Electronics Corporation

Gm Global Technolgoy Operations, Inc.

Microsemi Corp-analog Mixed Signal Group, Ltd.

James M Aralis

Frank J Bohac, Jr

Raymond Lippmann

James Edward Nelson

Michael J Schnars

James R Chintyan

Christopher J Daffron

Arkadiy Peker

Roni Blaut

Mark C Hansen

Simon Kahn

Anthony Luke Simon

Bruce L Troutman

Dave Helsel

Paul Walker

Frank J Calabretta

Bert S Moriwaki

Dino J Pollalis

Mark B Naglestad

A color controller for a luminaire constituted of: a thru-converter operative to convert an input signal to at least one luminaire drive signal; an illumination sampler arranged to sample an output from the luminaire and generate a representation thereof; and a feedback controller arranged to receive the output representation and generate the updatable conversion factor in cooperation with calibration luminance and color values, wherein the thru-converter operation is responsive to a trigger signal for defining a first and a second mode, the first mode for generating the luminaire drive signal for the luminaire responsive to the input signal being a frame luminance signal and target color signals and wherein the conversion to the at least one luminaire drive signal is responsive to an updatable conversion factor, and the second mode for generating the luminaire drive signal for the luminaire responsive to the feedback controller.

Color controller for a luminaire

The present invention includes a circuit and method for determining fly height based upon the PW50. A signal is used to provide a measure of PW50 by detecting the peak height and the area of the signal. The ratio of the peak height and area provides an indication of PW50 and correspondingly, the fly height.

Head fly height by using the applied peak area ratio to determine signal PW50

An improved auto-zeroing circuit for reducing offset currents from high impedance CMOS current drivers. The Auto zero circuit of the present invention contains means to disconnect the output of the current driver from its low impedance load, means to substantially simultaneously connect a capacitor to the output of the current driver, and means to use the output voltage of the current sources during the zeroing mode to adjust the voltage on the capacitor. The capacitor voltage is then used to adjust either of the two output current sources to reduce the offset currents.

Circuit for auto-zeroing a high impedance CMOS current driver

A method and circuit for automatically centering the control loop bias current by sensing and &ldquo;memorizing&rdquo; the total steady state bias current used by the function block (VGA or VCO) through the use of both digital and analog memory elements. The present invention uses an auto-centering, high-impedance current driver to supply the bias current. This current driver cancels out offset currents by exploiting the high output impedance nature of a CMOS current driver using cascoded or resistor source de-generated FET devices.

Circuit for auto-centering control loop bias currents

An apparatus for Position Error Signal (PES) measurement in a disk drive servo system includes a variable-gain amplifier that receives an analog servo signal; a multiplier coupled to the variable-gain amplifier; a low-pass filter coupled to the multiplier; a digital-to-analog converter; an analog summer that is coupled to the low-pass filter and to the digital-to-analog converter; an analog-to-digital converter coupled to the analog summer; a digital summer coupled to the analog-to-digital converter, and a phase-locked loop that provides timing signals to the multiplier, the digital-to-analog converter and the analog-to digital converter. The invention enables an output of the variable-gain amplifier to be multiplied with the clocking signal of the phase-locked loop. The multiplication output signal is then filtered by the low-pass filter. The output of the low-pass filter is summed with voltage ramp signals that are generated by the digital-to-analog converter and the resulting signals are converted to a series of 6-bit words by the digital-to-analog converter. Thereafter, the series of the 6-bit words are summed by the digital summer to generate a 10-bit PES.

Method and apparatus for position error signal (PES) measurement in a

An integrated circuit architecture and test methods for use in designing, fabricating and testing mixed-signal application specific integrated circuits. The architecture comprises a plurality of mixed-signal integrated circuits, bidirectional buffers coupled to the integrated circuits that provide for circuit reconfigurability, a bidirectional digital/analog test bus, and a serial test controller coupled to the buffers that controls normal operation and testing of the integrated circuits. The controller and plurality of buffers cooperate to couple signals from signal pads to the integrated circuits to provide for 'normal' operation thereof, and to re-route external test signals applied to selected signal pads to the integrated circuits to permit testing. Logic in the buffers provides for functional configurability, enabling them to be logically altered under control of the controller, and allowing the test bus to be connected directly to signal pads. All of the signal pads are available for use in testing, and provide a means of directly accessing key test points within the circuit without resorting test vectors. Test methods are disclosed and comprise: selecting an integrated circuit for testing; selecting signal pads that are to be used to test the selected integrated circuit, which selected signal pads are different from those used during normal operation of the integrated circuit; applying external test signals to the selected signal pads; routing the external test signals by way of the plurality of configurable buffers and the bidirectional bus from the selected signal pads to the integrated circuit; and monitoring input signals and output signals applied to and derived from the selected signal pads to test the selected integrated circuit.

Mixed signal integrated circuit architecture and test methodology

An apparatus for processing data, such as liquid level data in a motor vehicle containing a liquid storage tank, comprises a liquid level sensor for developing a signal indicative of instantaneous liquid level in the storage tank, circuitry for processing the instantaneous liquid level signal, including asymmetrical filtration of the instantaneous liquid level signal, to provide a process output signal, and a display apparatus for displaying an indication of the level of liquid in the storage tank in response to the process output signal.

Slew rate limiter with asymmetrical operation

An integrated circuit including a serial interface (12) having a nonvolatile memory (30) coupled to a and configuration of circuit boards and entire systems. A configurable circuits (10) containing switches, resistors, capacitors or digital logic devices has an unique identification code and is electrically configured by connection to a nonvolatile memory (30). An interrogation shift register (38) and a configuration data shift register (36) are serially connected to receive a serial bit stream (50) containing an interrogation code section and a configuration data section. The interrogation code, which is identical to the identification code of a selected one of the configurable circuits, is compared with the circuit identification code to provide a match pulse (42) that enables a program signal to initiate transfer of data from the data shift register (36) to the nonvolatile memory (30).

Nonvolatile serially programmable devices

A circuit including a sender providing a sender output signal responsive to a vehicle parameter, circuitry for providing an adjustable reference, circuitry for comparing the output signal to the adjustable reference and providing a comparison output signal therefrom, an up/down counter for filtering the comparison output signal, and circuitry for providing an indicator control signal in response to the filtered output signal and for controlling the adjustment of the adjustable reference, provides a signal to a vehicle operator that is both filtered and has hysteresis to minimize repeated switching of the signal between two states.

Filter with hysteresis for trip point applications

A circuit disclosed maintains ratiometric analog inputs to an integrated circuit using a network of resistors, some of which are external to the integrated circuit and some of which are internal to the integrated circuit, reducing expense. The analog inputs maintain a fixed ratio during fluctuations in supply voltage and fluctuations in temperature.

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Mission Viejo, CA, United States of America

James M Aralis