International Business Machines Corporation

James L Hardy, Jr

David Domina

Timothy Charles Krywanczyk

Steven Ross Codding

Eric Jeffrey White

Graham M Bates

A patterned portion of a patterned semiconductor substrate is removed by abrasive mechanical planarization employing an abrasive pad but without employing any slurry. Preferably, water is supplied to enhance the removal rate during the mechanical planarization. The removal rate of material is substantially independent for common materials employed in back-end-of-line (BEOL) semiconductor materials, which enables non-selective removal of the material containing metallization structures. The removal rate of silicon is lower than the removal rate for the BEOL semiconductor materials, enabling a self-stopping planarization process.

Slurryless mechanical planarization for substrate reclamation

Disclosed are embodiments of a method of removing patterned circuit structures from the surface of a semiconductor wafer. The method embodiments comprise blasting the surface of the semiconductor wafer with particles so as to remove substantially all of the patterned circuit structures. The blasting process is followed by one or more grinding, polishing and/or cleaning processes to remove any remaining circuit structures, to remove any lattice damage and/or to achieve a desired smoothness across the surface of the semiconductor wafer.

Method to recover patterned semiconductor wafers for rework

A method holds wafers that contain patterned structures using a particle blasting tool. Next, the method directs particles at the patterned structures, such that the particles contact the patterned structures with a predetermined velocity and remove the patterned structures. This process of directing the particles at the wafer is controlled to stop directing the particles when substantially all of the patterned structures are removed from the wafer. This process also comprises selecting the particles to have a size equal to or less than 3 microns. For example, the particles can comprise aluminum oxide, silicon oxide, cerium, and/or a plastic. By maintaining the particle size equal to 3 microns or less, the blasting produces a substantially smooth wafer surface, thereby omitting the need for subsequent wafer polishing. Further, the wafers produced by such processing do not exhibit the highly stress lattice and fragile nature of wafers processed by wet processing.

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Essex Junction, VT, United States of America

James L Hardy, Jr