Hughes Aircraft Company

Flir Systems, Incorporated

James L Gates

William J Parrish

Richard H Wyles

James R Herring

Steven D Gaalema

A micro-bolometric infrared (IR) staring array is described. The active element in each pixel within a two-dimensional array is a device having a selectively forward-biased p-n junction, e.g. a selectively biased diode. Each diode in the array serves as both an IR energy detecting element and a switching element. Each diode in a given row of the IR pixel array to be sensed, or read, is driven at a constant voltage, rendering its IR response highly controllable in the forward biased operating curve of the diodes in the addressed row. Diodes not being driven are, due to their reverse bias, in their off state producing minute leakage current and thus make no significant contribution to the sensed current representing a given pixel's IR exposure. The row-addressed driven or active diodes are sensed column by column by sample and hold techniques to produce a two-dimensional IR pixel image of a target. This simplifies the geometries as well as the cell structures while increasing the fill ratio to greater than approximately fifty percent. Moreover, manufacturing yields are greatly improved because of the topologic and process simplicities and compatibility with standard integrated circuit processes.

Micro-bolometric infrared staring array

A 3-dimensional circuit assembly includes a lower substrate, a first integrated circuit (IC) layer that is adhered to and electrically insulated from the substrate, electrical contacts for the IC layer, and separate electrical contacts for the substrate that extend through and are insulated from the IC layer. The IC layer is surmounted by an insulating layer through which the electrical contacts also extend, and across which interconnections between different contacts may be made. The IC layer and substrate are held together by an adhesion layer, with the adhesion, IC and insulating layers all being thin enough to assume the coefficient of thermal expansion for the underlying substrate, which is much thicker. The substrate may itself have a second IC layer to which contacts are made, or it may be implemented as the photodetector of a focal plane array. Two standard wafers are used to form the package, with the substrate for the upper wafer removed either before or after bonding to the lower wafer. Additional IC layers may be added by adding additional wafers in a similar fashion.

Method of making a 3-dimensional circuit assembly having electrical

A radiation detector includes a silicon substrate (12) having opposing first and second major surfaces, the substrate absorbing visible radiation incident upon the first major surface and passing into the substrate for generating charge carriers therefrom. The detector further includes a silicide layer (16) overlying the second major surface of the substrate, the silicide layer forming a Schottky-barrier junction with the underlying substrate. The silicide layer absorbs IR radiation for generating charge carriers therefrom. The substrate has a resistivity of approximately one thousand ohms per centimeter or greater for enhancing responsivity to visible radiation. A cavity structure (16) overlies the silicide layer and has a reflector (18) optically coupled thereto for reflecting IR radiation that passes through the silicide layer back to the silicide layer. To further enhance responsivity the substrate is thinned and has a thickness within a range of approximately 25 microns to approximately 125 microns.

Wideband schottky focal plane array

A pair of elongated rectangular metallic bumps are formed on two separate surfaces. The bumps are aligned orthogonally prior to being merged by hybridization to form a high density hybrid assembly. Translational misalignment does not change the interconnect area. Rotational misalignment causes only a slight change in the interconnect area. The bump surface area is increased by merging the bumps. This reduces the hybridization pressure which prevents the interconnect area from increasing in size, commonly known as mash out. The invention makes high density hybrid assemblies practical because it reduces the risk of short circuits between adjacent interconnects and results in a high yield in production.

High density interconnect

A readout circuit for use with a focal plane array that employs a single transistor in each unit cell and a single capacitive feedback transimpedance amplifier to process the outputs of each column of detector elements of the array. The capacitive feedback transimpedance amplifiers extract the signals associated with the pixels along a particular row of the array. The present invention permits high performance readouts to be constructed with very little circuitry in the unit cells. Only a single minimum sized transistor switch is required in each unit cell to perform readout and reset functions for the array. In the disclosed embodiment, the readout circuit comprises an array of unit cells, each cell comprising a detector input circuit, a single transistor and a single charge storage capacitor. Row address circuits are coupled to the cells in each row of the array. A plurality of capacitive feedback transimpedance amplifiers are coupled to the cells in each column of the array. The amplifiers process charge derived from the detector elements and stored in the charge storage capacitor of each unit cell. Column multiplexing circuits multiplex the output signals provided by each of the amplifiers. Column address circuits are coupled to the column multiplexing circuits which couple output signals from each of the multiplexer circuits as the output from the readout circuit.

Focal plane array readout employing one capacitive feedback

A meander channel charge couple device having a pair of parallel colinear elongate electrodes extending longitudinally along the length of the register disposed over a meander channel and formed in the same conductive layer so that they both reside at the same height above the semiconductor substrate, thereby providing a symmetrical surface potential distribution. Charge transfer instabilities beneath a gap separating the electrodes are eliminated by providing an additional set of electrodes, each extending transversely to the meander channel and to the first pair of parallel electrodes and spanning the gap. Contact is made by each of the longitudinal electrode pairs to alternate ones of the transverse electrodes and a two-phase clock system is applied to the longitudinal electrode pair.

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Vista, CA, United States of America

James L Gates