Lenovo (singapore) Pte. Ltd.

International Business Machines Corporation

James Joseph Parsonese

Pravin S Patel

Gary David Cudak

Luke David Remis

Mehul M Shah

Michael DeCesaris

Gregory David Sellman

Kevin S D Vernon

Jeffrey Ross Hamilton

Justin Potok Bandholz

Alfredo Aldereguia

Steven L Vanderlinden

Andrew S Heinzmann

Bhyrav M Mutnury

Fred Allison Bower, Iii

Moises Cases

Nam Huu Pham

Brian Christopher Totten

Christopher Landon Wood

Caihong Zhang

Grace Ann Richter

John K Langgood

Mark Elliot Andresen

Philip Louis Weinstein

Patrick Leo Caporale

Wilson Velez

Michael D French

Robert J Christopher

Joseph Eric Maxwell

Vinh B Lu

Menlo Wuu

David Eduardo Vieira

Jimmy X Tang

Carol Machuca

Xiao Dong Du

William Roff Thomas

Alan Fontaine

A multi-processor system includes first and second central processing units (CPUs) connected by a processor interconnect, a single baseboard management controller for managing operation of the first and second CPUs, wherein the first and second CPUs are operable as a single unified node, and a single keyboard, video and mouse connection, wherein the single keyboard, video and mouse connection includes a video controller and a USB controller. The multi-processor system may further comprise a multiplexer connected to the video controller and the USB controller, wherein the multiplexer has a selectable PCIe connection to either the first central processing unit or the second central processing unit. Program instructions may be executable by the baseboard management controller to send a selection signal to the multiplexer.

Multiplexer for selectively connecting a single KVM connection to multiple central processing units

A method for automatically switching input/output ('I/O') between partitioned systems based on power usage includes monitoring power usage for each of two or more systems, selecting a system of the two or more systems in response to power usage of the of the system reaching a power usage threshold, and switching an input of an I/O switch to send data for display of one or more elements of the selected system to an electronic display.

Auto switching video by power usage

A method for automatically switching input/output ('I/O') between partitioned systems based on system events includes monitoring a system state for each of two or more systems sharing an electronic display, where each of the two or more systems includes a processor executing an instance of an operating system, selecting a system of the two or more systems sharing the electronic display in response to determining that a change has occurred in the system state of the of the selected system, and switching an input of an I/O switch to send data for display of one or more elements of the selected system to the electronic display.

System and method for auto switching video by system events

A partitionable multi-processor system includes a first plurality of components of the multi-processor system forming a first partitioned node that is operable as a first independent node, a second plurality of components of the multi-processor system forming a second partitioned node that is operable as a second independent node and a system controller that is configured to selectively and independently control separate power, clock, and/or reset signals to the first plurality of components forming the first partitioned node and the second plurality of components forming the second partitioned node in response to receiving a first partitioning mode instruction from a baseboard management controller (BMC) that identifies a partitioned state and configured to selectively control the separate power, clock, and/or reset signals to the first and second pluralities of components in a unified manner in response to receiving a second partitioning mode instruction from the BMC that identifies a unified state.

Independent control of power, clock, and/or reset signals to a partitioned node

A baseboard management controller in a multi-processor system may perform operations including: identifying a partitioning mode (partitioned state or unified state) to implement on the multi-processor system having first and second central processing units (CPUs) located on a single motherboard; accessing, in response to the partitioned state, a first partitioned node configuration (P1C) for a first partitioned node (P1) and a second partitioned node configuration (P2C) for a second partitioned node (P2), wherein P1C identifies a first firmware interface level (F1L) and a first operating system to be used by P1, and wherein P2C identifies a second firmware interface level (F2L) and a second operating system to be used by P2; and causing the first CPU to load a first firmware interface having the identified F1L identified in the P1C and causing the second CPU to load a second firmware interface having the F2L identified in the P2C.

Multiple firmware levels in a partitionable multi-processor system

A baseboard management controller in a multi-processor system may perform operations including: causing, during a first time period, the system to operate in a partitioned state with a first partitioned node including a first subset of components of the system and a second partitioned node including a second subset of components of the system, wherein the first and second partitioned nodes are independently operable nodes having their own operating systems, and wherein the first partitioned node boots from a first boot drive that is included in the first subset; causing, during a second time period, the system to operate in a unified state with a single unified node including components from both the first and second subsets of components, wherein the single unified node has its own operating system; and causing the first boot drive to be inaccessible to the second partitioned node and the single unified node.

Making a boot drive for a first partition inaccessible to other partitions in a partitionable system

A system includes a partitionable multi-processor motherboard that has multiple central processing units, wherein the multi-processor motherboard may be configured to operate as a single unified node or configured to operate as multiple independent partitioned nodes. The system further comprises a single power button that is accessible to a user, wherein the single power button generates an output signal while being pressed, and an integrated circuit installed on the motherboard and connected to receive the output signal from the power button, wherein the integrated circuit stores a first button press gesture definition associated with selection of a first partitioned node, a second button press gesture definition associated with selection of a second partitioned node, and a third button press gesture definition associated with sequencing power to the selected one of the first or second partitioned nodes.

Button press gestures on a single power button to power sequence a selected partitioned node

A computer program product includes a non-volatile computer readable medium and non-transitory program instructions embodied therein, the program instructions being configured to be executable by a processor of a baseboard management controller in a multi-processor system to cause the processor to perform various operations. The operations include initiating disabling of a processor interconnect between first and second central processing units in the multi-processor system and initiating boot of the first central processing unit, wherein the first central processing unit operates in a first partitioned node independent of the second central processing unit.

Partitioning a multi-processor system having a single baseboard management controller

Embodiments provide a method and computer program product including program instructions executable by a baseboard management controller in a multi-processor system to perform various operations. The operations include detecting a number of memory modules connected to each of a plurality of central processing units (CPUs) in the multi-processor system during boot, initiating operation of the multi-processor system as a single unified node in response to each of the CPUs being connected to an equal number of memory modules, and initiating partitioning of the multi-processor system into a first partitioned node and a second partitioned node in response to a first set of one or more of the CPUs each being connected to a first number of memory modules and a second set of one or more of the CPUs each being connected to a second number of memory modules that is different than the first number of memory modules.

Partitioning responsive to processors having a disparate number of memory modules

Topology discovery between compute nodes and interconnect switches including creating, on an interconnect switch, a virtual topology discovery device for a first port, wherein the interconnect switch is coupled to a compute node via the first port, and wherein the virtual topology discovery device comprises a port identifier for the first port; mapping the virtual topology discovery device to the first port; receiving an inventory request from the compute node via the first port; routing the inventory request to the virtual topology discovery device for the first port; and sending, from the virtual topology discovery device for the first port, the port identifier to the compute node.

Topology discovery between compute nodes and interconnect switches

Modifying resources for composed systems based on resource models including receiving a workload for execution on a composed system; extracting workload characteristics from the workload; matching the workload characteristics to a resource model, wherein the resource model comprises an initial configuration of compute elements for the composed system and a configuration modification to the initial configuration of the compute elements as the workload executes; composing the composed system using the initial configuration of compute elements described by the resource model, wherein the composed system comprises a subset of compute elements from a resource pool of compute elements; and executing, based on the resource model, the workload using the composed system, including modifying the initial configuration of the compute elements according to the resource model.

Modifying resources for composed systems based on resource models

Storage devices are connected to a Peripheral Component Interconnect Express (PCIe) switch and form an input/output virtualization (IOV) replication cluster that can be exposed to a host processor via hardware root complex interconnecting the PCIe switch to the host processor. When a failed storage device is replaced with a new storage device, the new storage device can initiate a virtual root complex that connects to those storage devices containing data that was replicated on the failed storage device, to receive and copy the data on the new storage device. This replication process does not have to involve the hardware root complex or the host processor.

Replacement of storage device within IOV replication cluster connected to PCI-e switch

A system, method and a computer program product for performing the method are provided. The system includes a communication device installed in a vehicle, wherein the communication device is configured to receive a wireless network broadcast message including target criteria other than a network identifier, and output the broadcast message to a user if the communication device satisfies the target criteria. The method includes determining a current location of a first mobile communication device, and the first device sending a message containing target criteria associated with a target vehicle over a wireless data network, wherein the target criteria does not include a network identifier. The method further includes broadcasting the message containing the target criteria over a geographically-specific area including the current location of the first mobile communication device, wherein only a second mobile communication device satisfying the target criteria will receive and display the message.

Sending and receiving messages using target criteria other than a network identifier

A hardware system comprises a digital signal generator, which generates a digital electrical signal that describes a first physical state of a first device; an analog electrical signal generator, which generates an analog electrical signal that describes a second physical state of the first device; a hybrid digital state signal generator, which generates a hybrid digital state signal that comprises the analog electrical signal overlaid onto the initial digital electric signal; and a hybrid signal transmitter, which transmits the hybrid digital state signal from the first device to a second device, wherein the second device comprises a hybrid signal receiver/decoder that extracts the analog electrical signal from the hybrid digital state signal.

Managing slave devices

Systems and methods for allocating memory usage based on voltage regulator efficiency are disclosed. According to an aspect, a method may include receiving a first efficiency value of a first voltage regulator associated with a first memory device among multiple memory devices. The method may also include receiving a second efficiency value of a second voltage regulator associated with a second memory device of the memory devices. The method may also include receiving a request to write data to one of the first memory devices and the second memory device. The method may also include determining whether to write the data to the first memory device or the second memory device based on the first and second efficiency values. Further, the method may include writing the data to the first memory device or the second memory device based on the determination.

Growing community of inventors

Cary, NC, United States of America

James Joseph Parsonese