Freescale Semiconductor,inc.

Power Gold LLC

Motorola Corporation

Other

Sumitomo Electric Printed Circuits, Inc.

James Jen-Ho Wang

Young Sir Chung

Vijay Sarihan

Edward R Prack

Jin-Wook Jang

Lei L Mercado

Russell S Shumway

Jin Joo Park

Alfredo Mendoza

Rajashi Runton

Barbara Vasquez

Bernard W Boland

Justin Eugene Poarch

Masahiko Kouchi

Carl Emil D'Acosta

Paul Hui

In accordance with an embodiment, sensor structure has a first, second, and third laminated structures. The second laminated structure is positioned between the first laminated structure and the third laminated structure. The first laminated structure includes a first portion of a first sensing element and the third laminated structure includes a second portion of the first sensing element. The second laminated structure includes spacer elements that can be used to adjust the sensitivity of the sensor structure.

Film sensors array and method

In accordance with an embodiment, a circuit element includes a flexible foldable substrate having portions of a first inductor formed on first and second major surfaces of the flexible substrate. In accordance with another embodiment, a first electrically conductive trace having a first terminal, a second terminal, and a first annular-shaped portion between the first terminal and the second terminal is formed on a first portion of the first major surface. A second electrically conductive trace having a first terminal, a second terminal, a first annular-shaped portion between the first terminal and the second terminal of the second electrically conductive trace, and a second annular-shaped portion between the first terminal and the second terminal of the second electrically conductive trace is formed on the second major surface. The first electrically conductive trace is coupled to the second electrically conductive trace by a thru-via.

Inductor, transformer, and method

An embedded deviceis assembled within a flexible circuit assemblywith the embedded device mid-plane intentionally located in proximity to the flexible circuit assembly central planeto minimize stress effects on the embedded device. The opening, for the embedded device, is enlarged in an intermediate layerto enhance flexibility of the flexible circuit assembly.

Flexible circuit assembly and method therof

A flexible printed circuit assembly, having a first flexible printed circuit having a first conductive layer and a device that is connected the first conductive layer; and a second flexible printed circuit having a second conductive layer, an insulating center layer, and a third conductive layer, the insulating center layer arranged in-between the second and the third conductive layers, the second conductive layer and the insulating center layer being removed to form an opening to expose an upper surface of the third conductive layer, wherein the first flexible printed circuit is arranged such that the device is accommodated inside the opening, a lower surface of the device being in thermal connection with the third conductive layer, and the first conductive layer is arranged to be in electrical connection with the second conductive layer.

Method of embedding a pre-assembled unit including a device into a flexible printed circuit and corresponding assembly

Intelligent lighting systemis configured to operate from an AC source. An array of visible light emitting diodes (LEDs)responds to environmental room conditions monitored by a sensor circuit. A microcontrolleroperates in response to sensor circuit communications to control the state of the visible light array. An internal low noise voltage source VL is derived from the waste heat product from a portion of the LED array. The low noise voltage source is used to power the sensor circuit and the microcontroller.

Intelligent lighting system

Electronic fixture

A flexible circuit assembly for accommodating a plurality of power electronic devices, including an insulating cover layer having first openings for power electronic devices, a flexible conductive layer arranged under the insulating cover layer and attached with a first adhesive to the insulating cover layer, an intermediate insulating layer arranged under the flexible conductive layer and attached with a second adhesive to the flexible conductive layer, the intermediate insulating layer having second openings, a plurality of heat-conductive elements arranged inside the second openings, a first thin heat sink layer, the heat-conductive elements arranged to be in contact with an upper surface of the thin heat sink layer and the lower surface of the islands via heat-conductive material; and a second thin heat sink layer, upper surfaces of the power electronic devices arranged to be in contact with a lower surface of the thin heat sink layer and the lower surface of the islands via heat-conductive material.

Flexible electronic assembly and method of manufacturing the same

A high value capacitance per unit area capacitor is fabricated on a substrateby converting a portion of a primary function anti-reflecting conducting layerto a high value dielectric layerby partially oxidizing the conducting layer to form the dielectric layer. The resultant combination is sandwiched between two metal layer electrodesandto complete the capacitor structure.

Integrated nano-farad capacitors and method of formation

Flexible circuit assembly and method thereof

In a semiconductor wafer, the polyimide film underneath a power metal structure is partially etched to create corresponding surface depressions of the conformal top power metal. The depressions at the surface of power metal are visible under optical microscopy. Arrangement of the depressions in a pattern facilitates the alignment of probe needles, set-up of automated wire bonding and microscopic inspection for precise alignment of wire bonds.

Semiconductor bond pad patterns and method of formation

A stacked semiconductor device assembly () includes a device () having conductive traces () formed therein, and conductive interconnects () electrically connected to the conductive traces (). Another device () has conductive traces () formed therein and device pads () formed on an outer surface () of the device (). A method () entails attaching () a magnetic core () to an outer surface () of the device () and forming () the conductive interconnects () on the outer surface () using a stud bumping technique such that the interconnects () surround the magnetic core (). The conductive interconnects () are coupled () with the device pads () using thermocompression bonding to couple the device () with the device () to form a continuous device coil () wrapped around the magnetic core () from an alternating electrical connection of the traces (), the conductive interconnects (), and the traces ().

Stacked device assembly with integrated coil and method of forming same

An annular trench region is formed at a semiconductor substrate of an electronic device that defines a conductive plug of the through-wafer via, wherein the conductive plug includes an undisturbed portion of the semiconductor substrate.

Substrate having through-wafer vias and method of forming

An electronic device can include an inductor overlying a shock-absorbing layer. In one aspect, the electronic device can include a substrate, an interconnect level overlying the substrate, and the shock-absorbing layer overlying the interconnect level. The inductor can include conductive traces and looped wires. The conductive traces can be attached to the conductive traces over the shock-absorbing layer. In another aspect, a process can be used to form the electronic device including the inductor. In still another aspect, an electronic device can a toroidal-shaped inductor that includes linear inductor segments that are connected in series.

Electronic device including an inductor

A semiconductor device has contact between the last interconnect layer and the bond pad that includes a barrier metal between the bond pad and the last interconnect layer. Both a passivation layer and a polyimide layer separate the last interconnect layer and the bond pad. The passivation layer is patterned to form a first opening to contact the last interconnect layer. The polyimide layer is also patterned to leave a second opening that is inside and thus smaller than the first opening through the passivation. The barrier layer is then deposited in contact with the last interconnect layer and bounded by the polyimide layer. The bond pad is then formed in contact with the barrier, and a wire bond is then made to the bond pad.

Growing community of inventors

Phoenix, AZ, United States of America

James Jen-Ho Wang