At&t Information Systems Inc.

At&t Bell Laboratories

American Telephone and Telegraph, Co.

James J Ferenc

Gary J Grimes

Bryan Scott Moffitt

Robert William Gebhardt

Louis R Goke

Gabe A Sellers, Iii

Edward B Morgan, Jr

A modular, substantially infinitely-growable, multi-node switching system operates under distributed control to serve integrated circuit-switched and packet-switched traffic at the data rates appropriate for each type of traffic. The system comprises a plurality of interconnected identical switching units that form at least one communication switching node. A communication switching node is a modular building block of the system; a switching unit is a modular building block of a switching node, and hence also of the system. A plurality of communication endpoint nodes--illustratively PBXs--is connected to the one or more switching nodes for communicating with each other through the switching nodes. A plurality of communication links each connect a different one of the system's switching units to either (a) one of the communication endpoint nodes or (b) a unit of another switching node. All of the links have the same communication format. Each switching node includes a plurality of different ones of the identical switching units, and a communication medium that interconnects all of the units of the switching node to allow each unit of a node to broadcast all communications received from a connected link to all of the units of the node.

Building-block architecture of a multi-node circuit-and packet-switching

Apparatus for and a method of inserting circuit switch information and packetized data into different time slots of a time division multiplexed bus. A memory having a location individual to each time slot is written with information specifying whether the time slot individual to each location is to serve circuit switch information or packet data. The readout of each memory location during the occurrence of it's associated time slot controllably effects the application of either the circuit switch information or the packet data to the bus. Packet data can be inserted into each time slot not currently being used by the circuit switch. A special information bit is inserted into each time slot to specify whether the remainder of the bits of the time slot represents circuit switch or packet information. The information bit is used by receiving apparatus to steer the bits of each time slot to either a receiving circuit switch or a receiving packet switch.

Combined circuit switch and packet switching system

Apparatus and method are disclosed for checking the time slot data word integrity of data communications in a time multiplexed communication system. A predetermined control bit of each data word of a data frame is alternately switched from its normal control bit function to a bit of a pseudo random sequence (PRS) for time slot data word integrity checking. During alternate data frames a checking circuit compares the predetermined bit of received consecutive data words against consecutive bits of a reference PRS and outputs a time slot cross connect error signal when a difference occurs.

Apparatus and method for checking time slot integrity of a switching

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Boulder, CO, United States of America

James J Ferenc