International Business Machines Corporation

Globalfoundries Inc.

James J Demarest

Marc Adam Bergendahl

Christopher J Penny

Christopher Joseph Waskiewicz

Chih-Chao Yang

Kangguo Cheng

Yun-Yu Wang

Lawrence Alfred Clevenger

Juntao Li

Jonathan R Fry

Jean E Wynne

Balasubramanian S Haran

James John Kelly

Nicolas J Loubet

Ping-Chuan Wang

Timothy Joseph Dalton

Ronald G Filippi

Thomas M Shaw

Sean Teehan

Roger Allan Quon

Kaushik Chanda

Michael Wayne Lane

Darryl D Restaino

Roy Charles Iggulden

Philip L Flaitz

Chester T Dziobkowski

Stefanie Ruth Chiras

James R Lloyd

Robin H Chao

Allan Ward Upham

Alexander Reznicek

Carl John Radens

Oscar Van Der Straten

Hsueh-Chung Chen

Sanjay C Mehta

Koichi Motoyama

Louis C Hsu

Edward William Kiewra

John Gerard Gaudiello

Ryan O Jung

Derren Neylon Dunn

Alex Richard Hubbard

Richard A Johnson

Hong He

Vincent James McGahay

Raghavasimhan Sreenivasan

Lisa F Edge

Nathaniel C Berliner

Seth L Knupp

Loren L Hahn

Delia R Bearup

Andrew S Dalton

Bruce J Redder

Francis R Wallingford

Darren N Dunn

Raymond J Donohue

Edward W Kiewara

Embodiments of the invention provide a method that includes forming an IC layer having an inactive region and an active region. The active region includes a device-under-fabrication (DUF). The inactive region includes a geometric feature having a geometric shape. A film is deposited over the active DUF and the geometric feature such that a first portion of the film will be part of the active DUF, and such that a second portion of the film is over the geometric feature. A geometric shape of the film over the geometric feature matches the geometric shape of the geometric feature. Determining a thickness of the film is based at least in part a difference between a footprint of the geometric shape of the film and a footprint of the geometric shape of the geometric feature.

Conformal film thickness determination using angled geometric features and vertices tracking

An example operation may include one or more of connecting, by a load leveler, to a blockchain network comprising a plurality of nodes and configured to store a common work item, computing, by the load leveler, loads across the plurality of the nodes that need to execute the common work item upon completion of current tasks, determining, by the load leveler, a network load impact based on execution of a common blockchain consensus checking process on the network nodes, executing, by the load leveler, a work assessment process based on the loads computed across the plurality of the nodes and on the determined network load impact of the blockchain network, and assigning, by the load leveler, new tasks to the nodes based on results of the execution of the work assessment process.

Load leveler

A computer-implemented method executed by a processor for reducing exposure of a plurality of objects to environmental conditions by employing a smart room tracking system is presented. The computer-implemented method includes counting a number of individuals within a space including the plurality of objects via one or more image capture devices and determining whether each individual makes direct eye contact with any of the plurality of objects by evaluating orientation, posture, and eye movement of each individual. The computer-implemented method further includes shielding, via an object viewing controller, an object of the plurality of objects from view when no direct eye contact is determined and making an object of the plurality of objects viewable, via the object viewing controller, when direct eye contact is determined.

Smart display apparatus and control system

A blockchain may be used as a stochastic timer. The posting of a blockchain solution for verification may be a trigger that determines an event schedule. Because the only entity that knows when the solution will be posted is the solving entity, the solving entity may be rewarded with the ability to potentially exploit this knowledge. However, because the solving of a blockchain is a competitive process, there is a risk that if the solving entity retains the solution for greater exploitation, then another entity will post the solution and therefore gain the benefit. A blockchain stochastic timer can thus provide the necessary incentive for entities to invest computational resources into blockchain solutions.

Blockchain stochastic timer transaction synchronization

A system for performing diffraction analysis, includes a mill for removing a surface portion of a sample, and an analyzer for performing diffraction analysis on the milled sample.

System and method for performing nano beam diffraction analysis

A backend-of-the-line (BEOL) semiconductor capacitor made by method, apparatus, or computer program product, through an airgap metallization process, patterning a first electrode by removing a portion of inter-layer dielectric for a desired capacitor area, depositing a dielectric for a capacitor insulator, filling the desired capacitor area to form a second electrode, polishing and capping the second electrode, and interconnecting the first electrode and the second electrode. The manufactured product has a bottom electrode, composed of a conductor, electrically connected to upward conductive prominences; a low-K layer, above and conjoined to the bottom layer and surrounding the prominences, composed of a low-K dielectric; an isolation layer, above the low-K layer and surrounding the prominences, composed of a high-K insulator material, where modulating its material and thickness controls the capacitance; and a top electrode, composed of a conductor and electrically connected to downward prominences, where the bottom and top electrodes are interconnected.

BEOL capacitor through airgap metallization

A method of forming an electrical device that includes forming a first level including an array of metal lines, wherein an air gap is positioned between the adjacent metal lines. A second level is formed including at least one dielectric layer atop the first level. A plurality of trench structures is formed in the at least on dielectric layer. At least one of the plurality of trench structures opens the air gap. A conductive material is formed within the trenches. The conductive material deposited in the open air gap provides a vertical fuse.

BEOL vertical fuse formed over air gap

A vertical fuse element, including, a conductive silicide base on a surface of a substrate, and a conductive silicide pillar extending in a direction perpendicular to the surface of the substrate, where the conductive silicide pillar is on the conductive silicide base, and wherein the conductive silicide pillar includes an upper portion having a width, W, a base having a width, W, and a neck region having a width, W, where W&#x3c;W, and W&#x2264;W.

Fabrication of vertical fuses from vertical fins

Embodiments are directed to a method and resulting structures for forming a semiconductor device having a vertically integrated nanosheet fuse. A nanosheet stack is formed on a substrate. The nanosheet stack includes a semiconductor layer formed between an upper nanosheet and a lower nanosheet. The semiconductor layer is modified such that an etch rate of the modified semiconductor layer is greater than an etch rate of the upper and lower nanosheets when exposed to an etchant. Portions of the modified semiconductor layer are removed to form a cavity between the upper and lower nanosheets and a silicide region is formed in the upper nanosheet.

Vertically integrated nanosheet fuse

A semiconductor device and process of making the same generally includes simultaneously forming nanosheet capacitors with nanosheet FET devices on the same substrate. The nanosheets in the capacitor have a width and are coupled to one another by sacrificial layers, wherein the sacrificial layers have a width smaller than the nanosheet width, and wherein the nanosheets and the sacrificial layers are conductively coupled to the substrate. The nanosheets in the FET devices are spaced apart and free of sacrificial layers. The nanosheets in the FET device have a width less than half the width of the nanosheets in the capacitor region.

Integrated capacitors with nanosheet transistors

A system for performing diffraction analysis, includes a focused ion beam (FIB) device for preparing a sample, a mill for removing a surface portion of the prepared sample, and an analyzer for performing diffraction analysis on the milled sample.

Growing community of inventors

Fishkill, NY, United States of America

James J Demarest