United States of America As Represented by the Secretary of the Air Force

Northrop Grumman Systems Corporation

Westinghouse Electric Corporation

US Government As Represented by the Secretary of the Army

James Halvis

Nathan Bluzer

Robert Shiskowski

Thomas Evan Wilson

Li-shu Chen

Thomas J Knight

Joseph Terence Smith

Richard C McKee

Robert R Shiskowski

Timothy F Henricks

A focal plane staring sensor is provided that includes an M&#xd7;N sensor, where M is a number of rows of sensor pixels in the sensor and N is a number of columns of sensor pixels in the sensor, where M and N are integers greater than one. A control circuit samples a sensor pixel value for each sensor pixel of the M&#xd7;N sensor at a plurality of different integration times corresponding to an amount of time that a photonic charge can be acquired in each sensor pixel of the M&#xd7;N sensor, wherein the control circuit selects one sample from a set of samples to generate a scaled value to facilitate an equalization of a signal to noise ratio between the sensor pixels.

Staring focal plane sensor systems and methods for imaging large dynamic range scenes

A high-efficiency lateral multi-junction solar cell (C) includes ultra-low profile planar spectral band splitting micro-optics having a shortpass filter () reflecting desired frequencies of light () to a reflective mirror () combined with spectrally optimized photovoltaic (solar) cells.

Lateral ultra-high efficiency solar cell

The present invention provides a spectral filter for an optical sensor. The spectral filter includes a substrate having a focus region and a defocus region, a panchromatic filter region disposed on the focus region of the substrate and a multi-spectral filter region disposed on the defocus region of the substrate. The panchromatic filter region includes a plurality of panchromatic pixels, while the multi-spectral filter region includes a plurality of multi-spectral pixels. Each of the multi-spectral pixels includes a plurality of color pixels.

Spectral filter for optical sensor

A bolometer type focal plane is made up of a plurality of silicon sensors. Within each sensor, interconnection between co-planar stages is provided by elongated 'I' beam type bridge members having a generally rectangular cross-section including unequal wider (height) and narrower (width) dimensions, and wherein the bridge members are oriented such that the narrower width dimension is in the direction of the common plane and the wider height dimension is perpendicular to the common plane. A sensor with these bridges accommodates stress/strain by rotation while preventing out-of-plane deflection and deformation.

'I' beam bridge interconnection for ultra-sensitive silicon sensor

A CCD structure including high resolution pixels. The gate electrodes of the CCD are separated by gaps in the order of 0.6 .mu.m which are made to look smaller than their physical size by the use of dielectric filler material in the gaps. The dielectric filler material has a relatively high dielectric constant which is relatively large for the clock frequencies utilized but may be relatively low for optical frequencies. The dielectric constant of the dielectric filler material is typically greater than 20 and is selected from materials such as tantalum oxide, zirconium oxide, barium titanate and barium strontium titanate.

Charge coupled device gate structure having narrow effective gaps

An improved MOS photodetector having polysilicon gate material which is made more transparent to visible light by the addition of up to 50% carbon, and preferably about 10% carbon. The surfaces of the polysilicon-carbon gates are oxidized to form a silicon dioxide dielectric layer, thus eliminating the need to deposit a separate dielectric layer for isolation of adjacent gates in an overlapping gate array. The elimination of a separate dielectric layer permits all gates to be formed directly on the substrate dielectric layer, thus providing a uniform drive voltage requirement across the array.

Method of making transparent polysilicon gate for imaging arrays

Solid state image sensing apparatus including a readout circuit associated with each detector element. The readout circuit includes a clipping gate that operates to drain charge, from a charge storage region associated with the detector element, that is in excess of a potential barrier height of the clipping gate. The barrier height is first maintained at a lower value and then at a higher value during each frame integration period so that intensity range compression of a high level image signal is achieved, while a low level image signal is not affected by the operation of the clipping gate.

Clipped dynamic range compression image sensing apparatus

An infrared (IR) imaging device includes substantially identical top and bottom IR detector arrays. In separate embodiments, either a top or bottom surface of the top array is stacked onto the bottom array to confront a top surface of the bottom array and so that individual detector elements and subarrays of the top array are aligned with corresponding detector elements and subarrays of the bottom array. The image readout circuits of both the top and bottom array are connected by wire bonding to readout control circuits formed in the peripheral region of the wafer in which the bottom array is formed.

Infrared image detecting device and method

An IR detector structure is made from a CdTe substrate by polishing the C subtrate, and transferring the cleaned substrate to a chamber for successive epitaxial growth of HgCdTe and CdTe layers insitu without removal reducing contamination at the interfaces due to exposure to the atmosphere.

IR detector structure and method of making

A pseudo uniphase CCD array having four functional regions, a clocked barrier region, a clocked well region, a virtual barrier region, and a gate variable potential well region per stage. The described structure allows flexibility in setting operating voltages and avoids the breakdown and fabrication difficulties of a virtual well region. The device employs a virtual barrier plus adjacent MOS well fixed potential region and uses clocking of barrier and well regions to achieve charge transfer. A fabrication sequence and operating potential selection criteria are also included.

Pseudo uniphase charge coupled device

Pseudo uniphase charge coupled device fabrication by self-aligned

A solid state gas pressure sensor has a resistor of polysilicon deposited upon a dielectric substrate which electrically isolates and thermally prevents heat transfer to other devices thereon. A constant voltage is applied to the resistor. Depending upon the gas pressure over the sensor, a given current will be output once temperature equilibrium is established. A change in the gas pressure changes the output current of the resistor. The output current indicative of pressure is temperature corrected.

Solid state gas pressure sensor

Laser ranging in a volume of interest is accomplished using a laser transmitter, a planar matrix of photosensitive optical elements, a memory, a display, and a mechanical or electronic shutter. The laser transmitter directs a pulsed laser towards the volume of interest. The mechanical or electronic shutter shields all light from the planar matrix of photosensitive optical elements except during an interval occuring between times corresponding to the minimum range and maximum range of this laser rangefinder. The photosensitive optical elements each produce an output signal to the memory when receiving target echo return signals from objects in the volume of interest. When the memory is a plurality of charge coupled device storage registers integral to the optical elements, then the receiver array has its own internal memory, which may be accessed to indicate the range values of objects within the volume of interest.

Monolithic area array with shutter operable to only transmit light

A CCD gate definition process utilizing a thin film layer in a double masking process to form a first and second oxide layer over the polysilicon gate material to provide a profiled and tapered oxide layer over the gate without any re-entrant oxide steps.

Growing community of inventors

Severna Park, MD, United States of America

James Halvis