Cypress Semiconductor Corporation

James H Shutt

Timothy John Williams

Harold Kutz

Warren S Snyder

Bruce E Byrkett

Dennis Raymond Seguine

Bert Sullam

Eashwar Thiagarajan

Mark E Hastings

Nathan Wayne Kohagen

David Gordon Wright

Monte F Mar

Andrew J Walker

Helmut Puchner

Melany Ann Richmond

A microcontroller comprises a plurality of digital peripheral blocks and a direct memory access (DMA) controller coupled thereto. The plurality of digital peripheral blocks includes a digital peripheral block that is configured to issue a DMA request. Upon receipt of the DMA request, the DMA controller is configured to retrieve configuration information and to write the configuration information to a configuration register associated with a circuit element of the microcontroller.

Combined analog architecture and functionality in a mixed-signal array

A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manger coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.

A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manager coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.

An integrated circuit device may include a reconfigurable analog signal switching fabric comprising a plurality of global buses that are selectively connected to external pins by pin connection circuits in response to changeable analog routing data, and a plurality of local buses that are selectively connected to analog blocks and/or global buses by routing connection circuits in response to the analog routing data; and at least one processor circuit that executes predetermined operations in response to instruction data.

Dynamically reconfigurable analog routing circuits and methods for system on a chip

A system and apparatus are described for providing greater flexibility and performance in a mixed-signal array through improved and highly configurable routing, control elements and signal processing capabilities.

A system includes a voltage pump to generate a first pump voltage from an analog voltage signal. The system further includes switching pad to receive an analog signal from an external source and route the analog signal to analog processing circuitry over one or more analog signal busses based on the first pump voltage and the analog voltage signal.

Analog switching system for low cross-talk

A multi-mode digital-to-analog converter (DAC) configured to operate in a plurality of modes.

Programmable digital-to-analog converter

Circuits including a laterally diffused output driver transistor and a distinct device configured to provide electrostatic discharge (ESD) protection for the laterally diffused output driver transistor are presented. In general, the device configured to provide ESD protection includes a drain extended metal oxide semiconductor transistor (DEMOS) transistor configured to breakdown at a lower voltage than a breakdown voltage of the laterally diffused output driver transistor. The laterally diffused output driver transistor may be a pull-down or a pull-up output driver transistor. The device also includes a silicon controlled rectifier (SCR) configured to inject charge within a semiconductor layer of the circuit upon breakdown of the DEMOS transistor. Moreover, the device includes a region configured to collect the charge injected from the SCR and further includes an ohmic contact region configured to at least partially affect the holding voltage of the SCR.

Circuits providing ESD protection to high voltage laterally diffused metal oxide semiconductor (LDMOS) transistors

A device using a single external resistor for battery charging applications and a software current feedback control loop for use with the external resistor is described. For instance, a single resistor can be used to determine the charge electrical current level being used to charge a battery. The determined level from the single resistor can be used in a feedback loop to set the charge electrical current level and to determine if there is an over current condition requiring the charge current be shut down.

Method and apparatus for using an external resistor for charging applications

A frequency doubler circuit with trimmable current control. In one embodiment, the present invention provides a circuit comprising an oscillator with a current source and a frequency doubler circuit coupled to the current source. In one embodiment, the current source is for generating a reference current. In one embodiment, the frequency doubler circuit is operable to receive a first frequency signal for generating a second frequency signal and also receiving the reference current. The frequency doubler circuit, using the reference current, operates to compensate for process variation of capacitance of the frequency doubler circuit and uses the reference current to maintain a known duty cycle. In one embodiment, the circuit further comprises a control loop for generating an output current, wherein the output current, operating in conjunction with the reference current, operates to compensate for process variation of capacitance of the frequency doubler circuit and uses the reference current to maintain a known duty cycle. In one embodiment, the current source comprises a trimmable current control.

Frequency doubler circuit with trimmable current control

A microcontroller having a dual mode relax oscillator that is trimmable. In one embodiment, the present invention provides a relaxation oscillator circuit comprising two current sources for establishing a reference voltage for use in causing the relaxation oscillator circuit to operate in two power modes, and a control coupled to both current sources for switching between power modes. In one embodiment, one power mode is a low power mode for standard operation of the microcontroller and one power mode is a very low power mode for use in a sleep mode. In one embodiment, the relaxation oscillator circuit further comprises digitally trimmable components operable to control a current charging a capacitor of the relaxation oscillator circuit to account for process variation in the capacitor, wherein the current is for controlling a frequency of the microcontroller.

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Seattle, WA, United States of America

James H Shutt