Sono-tek Corporation

General Research Corporation

Cavitat Medical Technologies, Ltd.

Cavitat, Inc.

James H Gordon

Robert J Jones

A reduced noise ultrasound piezo film array on a printed circuit board. A printed circuit board carries a piezo array on one end and a standard coupling at the other end. The board is made in four layers with the two external layers being ground planes to prevent noise pickup. The two internal layers carry printed circuit lines between various elements of the array and terminals of the connector. The various arrays are sequentially scanned. All of the lines except the one selected are connected to ground to prevent crosstalk and noise pickup.

Reduced crosstalk ultrasonic piezo film array on a printed circuit board

A method and apparatus detects cavitation in the jawbone of human. The apparatus generates an ultrasonic pulse and passes the pulse through the jawbone of a human. The pulse is detected by an ultrasonic receiving unit. Attenuations in the amplitude of the pulse are detected and displayed on a color monitor. The color monitor allows the detection of cavitations by interpreting color codes in a 4.times.4 matrix displayed on the monitor.

Ultrasonic apparatus and for precisely locating cavitations within

The disclosure relates to a circuit using a relatively inexpensive low sampling rate resolution A/D converter for sampling repetitive signals which provides resolution far superior to that obtained normally from the converter being used. This is accomplished by providing a programmable variable delay which delays the system clock signal with respect to the trigger signal and controls the A/D converter with the delayed clock signal. The A/D converter receives input signal initiated by a flip flop responsive to a system start signal and the clock signal. The delay is varied for successive sampling of the repetitive signal received from the system under test so that sampling takes place at numerous points along the test signal. The converted signals are stored under joint control of the delayed clock signals and the output of the initiating signal from the flip flop. A gated clock circuit is used where an externally generated trigger is being used.

Circuit for providing high sampling rate resolution using slow sampling

The disclosure relates to a circuit using a relatively inexpensive relatively slow sampling rate A-D converter which provides resolution which is far superior to that obtained normally from the A-D converter being used. This is accomplished by providing a variable delay circuit wherein the delay is controllable. The maximum delay of the delay circuit is matched to the sampling rate of the A-D converter being used. The delay is then varied so that trigger pulses for commencing a sampling cycle are commenced at different points along the wave or information signal being sampled so that, after several different amounts of delay have been provided to information initiating triggering pulses, the information signal will have been sampled at various points therealong to provide the higher degree of resolution required while still using a relatively inexpensive slow sampling rate A-D converter.

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Fairfax Station, VA, United States of America

James H Gordon