Lsi Logic Corporation

Lsi Corporation

James G Monthie

Anwar Ali

Martin Fennell

Stan Mihelcic

Vineet Sreekumar

Iain Stickland

Frank A Walian

Ranjit Yashwante

Samit K Chakraborty

An integrated circuit having a programmable clock spreader configured to generate a plurality of controllably skewed clock signals, each applied to a corresponding region within the integrated circuit with circuitry configured to be triggered off the applied clock signal. The programmable clock spreader is designed to enable customization of the current-demand characteristics exhibited by the integrated circuit, e.g., based on the circuit's spectral impedance profile, to cause transient voltage droops in the power-supply network of the integrated circuit to be sufficiently small to ensure proper and reliable operation of the integrated circuit.

Programmable clock spreading

A method of estimating power consumption of an electronic device is performed by a processing device. The estimating includes estimating a power consumption of a gate-level implementation of an electronic device design. The estimating further includes independently calculating for each of a plurality of implementation-invariant nodes of the design an incremental power dissipation associated with that node.

Power estimation using activity information

The present invention is directed to methods for optimizing package and silicon co-design of an integrated circuit. A composite bump pattern for an integrated circuit is created based on a first library including at least one bump pattern template. PCB and Die constraints of the integrated circuit are then reviewed. A partial package design for the integrated circuit is generated based on a second library including at least one partial package template. A partial silicon design for said integrated circuit is started. A full package design for the integrated circuit is then completed. A full silicon design for the integrated circuit is completed.

Methods for optimizing package and silicon co-design of integrated circuit

A method for re-using diffused cell-based IP blocks in a structured application specific integrated circuit comprising the steps of (A) implementing one or more blocks of intellectual property (IP) using a plurality of cell-based building blocks and (B) providing one or more alternative views for at least one of the one or more blocks of intellectual property.

Growing community of inventors

Fulton, MD, United States of America

James G Monthie