Intel Corporation

James G Hermerding, Ii

Chee Lim Nge

Zhongsheng Wang

Eric DiStefano

Efraim Rotem

Alexander Uan-Zo-Li

Vasudevan Srinivasan

Sudheer Nair

Eugene Gorbatov

Tawfik M Rahal-Arabi

Guy M Therien

Nir Rosenzweig

Ketan R Shah

Jorge Pedro Rodriguez

Krishnakanth Venkata Sistla

Doron Rajwan

Jianfang Olena Zhu

Deepak Samuel Kirubakaran

Ishmael F Santos

Eliezer Weissmann

Barnes Cooper

Ankush Varma

David W Browning

Russell Jerome Fenger

Neil W Songer

Andrew D Henroid

Chia-Hung Sophia Kuo

Rajshree Chabukswar

Soethiha Soe

Columbia Mishra

William A Braun

Raoul Rivas Toledano

Carin Ruiz

Udayan Kapaley

Avishai Wagner

Jeremy J Shrall

Ryan Donovan Wells

Naoki Matsumura

Tod F Schiff

Bijendra Singh

Navneet Kumar Singh

Yifan Li

Basavaraj B Astekar

Tin-Cheung Kung

Muhammad Abozaed

Venkatesh Ramani

Jenn Chuan Cheng

Refael Mizrahi

Helin Cao

Gilad Olswang

Moran Peri

Ido Karavany

Pranava Alekal

Stefan Rusu

Stephen H Gunther

Alon Naveh

Avinash N Ananthakrishnan

Rajiv K Mongia

Rakesh Bhatia

Kelan Craig Silvester

Andrew Keates

Premanand Sakarda

Bo Qiu

Dorit Shapira

Joseph T Dibene, Ii

Edward R Stanford

Hung-Piao Ma

Srikanth Potluri

Esfir Natanzon

Biswajit Sur

Mark J Gallina

Philip R Lehwalder

Eugene P Matter

Pronay Dutta

Brian C Fritz

Patrick K Leung

Ashraf H Wadaa

Leeor Peled

Akhilesh P Rallabandi

Meenakshi Gupta

Hanna Alam

Joshua Resch

John Wallace

Gil Schwarzband

Jeffrey Jull

Ashwin Umapathy

Amir Leibovitz

Renji Thomas

Deepak Ganapathy

Ruoying Ma

Sze Ling Yeap

Robert D Padilla

Patrick Kam-Shing Leung

Merwin M Brown

Tahi Hollander

Ashwin Umpathy

Maytal Toledano

Ramya Subramanian

Steven H Gunther

Leo Aqrabawi

For example, a power-setting controller may be configured to provide a power setting for a processor based on one or more sensor-based inputs corresponding to one or more temperature sensors. For example, a sensor-based input corresponding to a temperature sensor may include a temperature input and a target temperature. For example, the power-setting controller may include one or more NNPID-based power controllers configured to provide one or more sensor-based power settings corresponding to the one or more temperature sensors. For example, an NNPID-based power controller of the NNPID-based power controllers may be configured to provide a sensor-based power setting corresponding to the temperature sensor based on the sensor-based input corresponding to the temperature sensor. For example, the NNPID-based power controller may include an NNPID controller configured to determine a temperature setting based on the temperature input and the target temperature corresponding to the temperature sensor.

Apparatus, system and method of providing a power setting for a processor

A hardware and/or software (e.g., a controller and/or firmware or software) that monitors a remaining capacity of a battery and adjusts a continuum of system performance settings ranging from best performance to best energy efficiency. The controller starts with best performance setting (at the expense of energy efficiency), and then the controller gradually shifts toward energy efficiency setting (at the expense of performance) when a battery usage exceeds a pre-defined drain rate (e.g., there is a deficit in the battery remaining capacity until the next charge). The controller reverts from energy efficiency setting towards high performance setting when the battery drain rate or discharge rate slows down (e.g., there is a surplus in the battery remaining capacity until the next charge).

Predictable battery power management apparatus and method

Methods, apparatus, systems and articles of manufacture for power sharing between discrete processors are disclosed. An example apparatus includes a thermal monitor to monitor temperatures of first and second discrete processors and a balance controller to, in response to a first temperature of the first processor satisfying a temperature threshold, adjust first and second power budgets allocated to the respective first and second processors.

Methods and apparatus for power sharing between discrete processors

A driver (e.g., a firmware or software) that improves the performance of the system-on-chip (SoC) in battery mode. The driver is a Peak Power Manager (PPM) which allows drastically higher SoC peak power limit levels (and thus higher Turbo performance) in battery mode. The PPM sets the Vth threshold voltage (the voltage level at which the platform will throttle the SoC) in such a way as to prevent the system from unexpected shutdown (or black screening). The PPM calculates the Psoc,pk SoC Peak Power Limit (e.g., PL4), according to the threshold voltage (Vth). These are two dependent parameters, if one is set, the other can be calculated. The scheme by the PPM is used to optimally set one parameter (Vth) based on the system parameters, and the history of the operation.

Processor peak current control apparatus and method

In one embodiment, a processor includes: at least one core; and a power controller coupled to the at least one core. The power controller may include: a workload monitor circuit to calculate a background task ratio based on a first amount of time that the at least one core executed background tasks during an active duration; and a control circuit to dynamically apply a power management policy for a background mode when the background task ratio exceeds a background mode threshold, the power management policy for the background mode to reduce power consumption of the processor. Other embodiments are described and claimed.

System, apparatus and method for dynamically adjusting platform power and performance based on task characteristics

Methods, apparatus, and systems to dynamically schedule a workload to among compute blocks based on temperature are disclosed. An apparatus to schedule a workload to at least one of a plurality of compute blocks based on temperature includes a prediction engine to determine (i) a first predicted temperature of a first compute block of the plurality of compute blocks and (ii) a second predicted temperature of a second compute block of the plurality of compute blocks. The apparatus also includes a selector to select between the first compute block and the second compute block for assignment of the workload. The selection is based on which of the first and second predicted temperatures is lower. The apparatus further includes a workload scheduler to assign the workload to the selected one of the first or second compute blocks.

Methods, apparatus, and systems to dynamically schedule workloads among compute resources based on temperature

Apparatus and methods for thermal management of electronic user devices are disclosed herein. An example apparatus includes at least one of a user presence detection analyzer to identify a presence of a user relative to an electronic device based on first sensor data generated by a first sensor or at least one of an image data analyzer or a motion data analyzer to determine a gesture of the user relative to the device based on second sensor data generated by a second sensor; a thermal constraint selector to select a thermal constraint for a temperature of an exterior surface of the electronic device based on one or more of the presence of the user or the gesture; and a power source manager to adjust a power level for a processor of the electronic device based on the thermal constraint.

Apparatus and methods for thermal management of electronic user devices based on user activity

Methods, apparatus, systems and articles of manufacture are disclosed to monitor and manage usage of resources on a computing platform. An example apparatus includes a processor and a subsystem. The example processor includes a modified operating system, the operating system modified to monitor application execution via the processor to determine a usage scenario for the apparatus. The example processor includes an index generator to generate a system usage scenario index quantifying a snapshot of the usage scenario for the processor and the subsystem of the apparatus. The example processor includes a rebalancer to reallocate resources of at least one of the processor or the subsystem based on the system usage scenario index.

Usage scenario based monitoring and adjustment

Disclosed Methods, Apparatus, and articles of manufacture to dynamically enable and/or disable prefetchers are disclosed. An example apparatus include an interface to access telemetry data, the telemetry data corresponding to a counter of a core in a central processing unit, the counter corresponding to a first phase of a workload executed at the central processing unit; a prefetcher state selector to select a prefetcher state for a subsequent phase based on the telemetry data; and the interface to instruct the core in the central processing unit to operate in the subsequent phase according to the prefetcher state.

Methods and apparatus to dynamically enable and/or disable prefetchers

Methods, apparatus, systems, and articles of manufacture are disclosed to improve computing device power management. An example apparatus includes a usage classifier to classify usage of a computing system, a low battery probability determiner to determine a probability of the computing system operating with a low battery capacity based on the classification, a policy reward determiner to determine an adjustment of a policy based on at least one of the classification or the probability, and determine a battery capacity of the computing system in response to the adjustment, and a policy adjustor to adjust the policy in response to the battery capacity satisfying a threshold.

Methods and apparatus to improve computing device power management

Described are mechanisms and methods for implementing highly configurable power delivery management policies. An apparatus may comprise a first circuitry, a second circuitry, a third circuitry, and a fourth circuitry. The first circuitry may include a memory to store a first table having one or more first entries and to store a second table having one or more respectively corresponding second entries. The second circuitry may, upon the occurrence of an event, test a condition specified by an entry in the first table. The third circuitry may, upon the test of the condition having a positive result, evaluate a set of one or more parameters as specified by an entry in a second table corresponding with the entry in the first table. The fourth circuitry may initiate a power-management action based upon the evaluation of the set of one or more parameters.

Highly configurable power-delivery management policy

A machine-learning (ML) scheme running a software driver stack to learn user habits of entry into low power states, such as Modern Connect Standby (ModCS), and duration depending on time of day, and/or system telemetry. The ML creates a High Water Mark (HWM) number of dirty cache lines (DL) as a hint to a power agent. A power agent algorithm uses these hints and actual system's number of DL to inform the low power state entry decision (such as S0i4 vs. S0i3 entry decision) for a computing system.

Intelligent prediction of processor idle time apparatus and method

Peak power setting circuitry is provided to set a peak power value for an integrated circuit device. A power supply interface is to receive a value to estimate a peak power capacity of a power supply serving the integrated circuit device and processing circuitry is provided to calculate an approximate peak power for the integrated circuit device. A peak power for the integrated circuit device is determined by increasing the approximate peak power depending on an amount by which the integrated circuit device power is reduced in response to assertion of a throttling signal.

Peak power determination for an integrated circuit device

In one embodiment, a processor includes at least one core to execute instructions and a power controller coupled to the at least one core. The power controller may include a first logic to cause the at least one core to exit an idle state and enter into a maximum performance state for a first time duration, thereafter enter into an intermediate power state for a second time duration, and thereafter enter into a sustained performance state. Other embodiments are described and claimed.

Processor having accelerated user responsiveness in constrained environment

Growing community of inventors

San Jose, CA, United States of America

James G Hermerding, Ii