Texas Instruments Corporation

James G Bohlman

Cecil J Davis

Lee M Loewenstein

Robert T Matthews

John I Jones

Randall C Hildenbrand

Bruce Simpson

Joseph V Abernathy

Monte A Douglas

Che-Chia Wei

Ih-Chin Chen

Thomas E Tang

Bing W Shen

Hun-Lian Tsai

The present invention provides a method for inhibiting the oxidation of a titanium layer during the direct reaction of the titanium with exposed silicon areas of an integrated circuit. In one embodiment of the present invention, a titanium nitride layer is formed on the surface of the titanium layer in the reactor where the titanium layer is deposited. The titanium nitride layer provides an effective barrier against oxidation. Thus, the formation of titanium dioxide is inhibited. In addition, in those areas where titanium nitride local interconnect is to be formed between diffused areas, the extra thickness provided by the top titanium nitride layer adds in the integrity of the conductive layers. By conducting the silicidation in a nitride atmosphere, diffusion of the nitride from the titanium nitride layer into the titanium layer and substitution of those lost nitrogen atoms by the atmosphere occurs thus providing a blocking layer for the formation of titanium silicide shorts.

Selective silicidation process using a titanium nitride protective layer

A capacitor, and a method for making the same, are disclosed, wherein one plate of the capacitor comprises silicon. The dielectric material of the capacitor includes a silicon nitride layer disposed adjacent the silicon plate, and a layer of yttrium oxide disposed thereover. The second plate of the capacitor is formed over the yttrium oxide layer. The silicon nitride provides a barrier to the diffusion of silicon into the yttrium oxide film if the structure is heated, providing for a high dielectric constant capacitor dielectric which has improved leakage characteristics.

Stacked insulating film including yttrium oxide

A process module which is compatible with a system using vacuum wafer transport in which wafers are generally transported and processed in a face down position under vacuum, and which also includes an additional wafer movement, wherein, after a wafer has been emplaced face down, in a position where it can be clamped against the susceptor, the susceptor is rotated from its approximately horizontal position up to a more nearly vertical position. In the more nearly vertical position, the wafer can be processed by a top process module, which may be, e.g., a sputter system, an implanter, or an inspection module. Another process module is included in the bottom part of the chamber, so that the wafer can be processed by the lower process module while in its substantially horizontal position and processed by the upper process module when it is in its more nearly vertical position. This is especially advantageous when the lower process module is a plasma cleanup module and the top module is a deposition module.

Processing apparatus

A processing apparatus and method which permits sputter deposition and which is compatible with a vacuum processing system wherein the wafers are largely transferred and processed in the face down position. This includes an additional wafer movement, wherein, after a wafer has been emplaced face down, in a position where it can be clamped against the susceptor, the susceptor is rotated from its approximately horizontal position up to a more nearly vertical position. While the wafer is in the more nearly vertical position, sputter deposition may be performed. In situ or remote plasma capability is usefully provided in the bottom part of the chamber, so that a dry deglaze or cleanup step can be performed while the wafer is in its substantially horizontal position, followed by a sputter deposition after the wafer has been moved to its more nearly vertical position.

Growing community of inventors

Forney, TX, United States of America

James G Bohlman