International Business Machines Corporation

Qualcomm Incorporated

Maxim Integrated Products, Inc.

James Francis Imbornone

Jean-Marc Roger Mourant

Xiangdong Zhang

Xinwei Wang

Zhenying Luo

Tao Liang

Theron Jones

Daniel Shkap

Richard Dean Davis

John Frank Scampini

Marc Gerald Dicicco

Ron Gatzke

Frederic Carrez

Xuejin Wang

Gregory Krzystof Szczeszynski

A device includes a first circuit path coupled to a first node and a second node, the first circuit path having at least one first varactor circuit configured to receive a first tuning voltage, the first circuit path having a resistor with a selectable value, and a second circuit path coupled to the first node and the second node, the second circuit path having at least one second varactor circuit configured to receive a second tuning voltage, the second circuit path having a capacitor with a selectable value.

Quadrature current-combining linearizing circuit for generating arbitrary phase and amplitude

Techniques for improving the linearity of radio-frequency (RF) front-end switches. In an aspect, open-loop techniques are disclosed for superimposing the output voltage of one or more negative rectifiers on a negative substrate bias voltage to reduce the non-linearities associated with voltage-dependent substrate leakage current. In another aspect, closed-loop techniques are further disclosed for maintaining the substrate bias voltage close to a reference voltage. Exemplary embodiments of the circuit blocks are further described.

Analog switch for RF front end

A frequency mixer having parallel mixer cores is described that is configured to heterodyne a signal. In an implementation, the frequency mixer includes a first mixer core and a second mixer core. A first balun is connected to the first mixer core and configured to furnish a LO signal occurring in a first range of frequencies to the first mixer core. The mixer includes a second balun coupled to the second mixer core, and the second balun is configured to furnish a LO signal occurring in a second range of frequencies during a second time interval. The mixer includes a first biasing voltage source that is center tapped to the first balun and a second biasing voltage source is center tapped to the second balun to further prevent operation of the at least substantially non-operational mixer core.

Frequency mixer having parallel mixer cores

Analog beamformers for continuous wave ultrasonic receivers, typically realized in integrated circuit form and using a direct quadrature baseband conversion architecture for CW Doppler to eliminate a second down conversion mixer and second synthesizer. The beamformers use integrated mixers and LO's for phase steering, and dedicated ring counters for each channel for lower noise. Input filtering may be provided with switchable RF input low pass filters. The integrated circuit includes the ultrasound signal VGA and beamformer on the same chip. An auxiliary channel may be included for a self-test mode. Also a programmable bit soft shutdown feature, programmable via the serial port, allows disabling individual channels. Various other features are disclosed including cascading of multiple integrated circuits for a much greater number of channels.

Analog beamformers for continuous wave ultrasonic receivers

An image trap filter disposed between the low noise amplifier and the mixer of a radio frequency receiver that overcomes the adverse effect of process variations on image signal rejection for both a single-band radio frequency receiver and a multi-band radio frequency receiver by setting the image trap filter response at the center of the band of interest at production test. The image signal problem is presented at the input of the radio frequency receiver and the image trap filter is adjusted for the desired frequency response.

Image trap filter

An image trap filter used in a radio frequency receiver for filtering an image signal from a radio frequency signal. The image trap filter includes an inductor and a capacitor connected in series in a first branch with the first branch connected in parallel with an impedance in a second branch. For low-side injection of the local oscillator signal (i.e., the frequency of the local oscillator signal is lower than the radio frequency signal), the impedance in the second branch is a capacitor and the series-connected inductor and capacitor in the first branch resonate at the frequency of the image signal and present a low impedance at the frequency of the image signal and a somewhat higher inductive impedance at the frequency of the radio frequency signal that resonates with the capacitor in the second branch at the frequency of the radio signal. For high-side injection of the local oscillator signal (i.e., the frequency of the local oscillator signal is higher than the frequency of the radio frequency signal), the impedance in the second branch is an inductor and the series-connected inductor and capacitor in the first branch resonate at the frequency of the image signal and present a low impedance at the frequency of the image signal and a somewhat higher capacitive impedance at the frequency of the radio frequency signal that resonates with the inductor in the second branch at the frequency of the radio signal.

To overcome problems in an image reject mixer in a radio frequency receiver when there is a degradation in image rejection due to process variations, such as variations in the values of components, a reactance feedback path of a first differential amplifier in the intermediate frequency combiner of the image reject mixer is tuned during assembly of the radio frequency receiver. This tuning places the first differential amplifier and a second differential amplifier in the intermediate frequency combiner in phase quadrature when the pole frequency of reactance feedback path is at least ten times lower than the frequency of the intermediate frequency and sets the gain of the two differential amplifiers to be equal when the reactance of the reactance feed back path in the first differential amplifier is equal to the resistance of a resistance feedback path in second differential amplifier.

Image reject mixer

A compact BALUN transformer comprises a primary and a secondary conductor loop. Each of these loops are disposed in a substantially flat spiral configuration. However, one of these loops, either the primary or the secondary, is preferably disposed in a multi-layer (stacked) configuration. The stacking of at least one of the primary or secondary layers in a multi-layer arrangement provides an increase of impedance in one of the loops. This increased impedance for impedance matching purposes comes with the advantage that parasitic capacitance between primary and secondary layers as would normally be introduced in a multi-layer configuration is absent. In another embodiment of the present invention, both conductor loops are disposed in a multi-layer configuration. Such configurations are particularly useful for 1 to 1 impedance matching conditions and for somewhat lower frequency BALUN circuits.

Compact multilayer BALUN for RF integrated circuits

A balun transformer having two series connected transformers with each having a primary loop conductor disposed in a stacked configuration. One portion of each primary loop conductors is in a first layer and these two portions of the two primary loop conductors are connected in series. The second portions of the primary loop conductors are in a second layer that is spaced from the first layer with the secondary loop conductors interlaced with these portions of the primary loop conductors in the second layer.

Substrate shielded multilayer balun transformer

An amplifier in which the gain is changed by changing the reactance in the emitter of a transistor and this change in reactance is compensated for by changing the reactance in a feedback path between the collector and the base of the transistor to maintain the input impedance to the amplifier fixed.

Variable gain amplifier

A circuit and a method for starting a bandgap circuit which is in a &ldquo;non-start&rdquo; mode. The circuit incorporates an inverter circuit with hysterysis and sharp transitions caused by a positive feedback loop. The inverter circuit, which is connected at its input to a bandgap voltage node of the bandgap circuit, activates a switching transistor when voltage (Vbg) at the bandgap voltage node is low and deactivates the switching transistor when Vbg is high. The switching transistor draws current from a critical node of the bandgap circuit, such as the drain of a current mirror PMOS transistor, when it is activated, starting the bandgap circuit.

Bandgap start-up circuit

A planar BALUN circuit comprises two separate parallel branches with three capacitive elements. The values of the capacitive elements are selected to provide impedances which first of all enhance balanced current flow and which also impede and reduce unbalanced current flow. The circuit is provided so as to lie substantially in a single plane as a pattern disposed on a printed circuit board together with either certain discrete capacitive elements or with capacitive structures which are also printed on the board. The BALUN circuits of the present invention are particularly useful for circuits operating in the gigahertz range and are particularly useful in light weight devices such as cellular telephones and cellular telephone systems.

Growing community of inventors

Methuen, MA, United States of America

James Francis Imbornone