Rambus Inc.

Citrix Systems, Inc.

Citrix Sysrems, Inc.

James Edward Harris

Thomas Vogelsang

Frederick Abbott Ware

Ajay Soni

Arkesh Kumar

Michael Guidash

Craig M Smith

Jay Endsley

Ian P Shaeffer

Charu Venkatraman

Junxiao He

Puneet Agarwal

Amarnath Mullick

John W Ladd

Shashi Nanjundaswamy

Akshat Choudhary

Ravindranath Thakur

Rui Li

Michael T Ching

Saibal Kumar Adhya

Srinivasan Thirunarayanan

Frank Armstrong

Punit Gupta

Song Xue

John Eric Linstadt

Brent Steven Haukness

David Geoffrey Stork

Maxim W Smirnov

Jie Shen

Yueyong Wang

Max He

Shashi Najundaswamy

A memory module with multiple memory devices includes a buffer system that manages communication between a memory controller and the memory devices. Each memory device supports an access mode and a low-power mode, the latter used to save power for devices that are not immediately needed. The module provides granular power management using a chip-select decoder that decodes chip-select signals from the memory controller into power-state signals that determine which of the memory devices are in which of the modes. Devices can thus be brought out of the low-power mode in relatively small numbers, as needed, to limit power consumption.

Memory systems and methods for improved power management

Row activation operations within a memory component are carried out with respect to subrows instead of complete storage rows to reduce power consumption. Further, instead of activating subrows in response to row commands, subrow activation operations are deferred until receipt of column commands that specify the column operation to be performed and the subrow to be activated.

Deferred fractional memory row activation

Memory with deferred fractional row activation

A pixel array within an integrated-circuit image sensor is exposed to light representative of a scene during a first frame interval and then oversampled a first number of times within the first frame interval to generate a corresponding first number of frames of image data from which a first output image may be constructed. One or more of the first number of frames of image data are evaluated to determine whether a range of luminances in the scene warrants adjustment of an oversampling factor from the first number to a second number, if so, the oversampling factor is adjusted such that the pixel array is oversampled the second number of times within a second frame interval to generate a corresponding second number of frames of image data from which a second output image may be constructed.

High dynamic-range image sensor

A sequence of control voltage levels are applied to a control signal line capacitively coupled to a floating diffusion node of a pixel to sequentially adjust a voltage level of the floating diffusion node. A pixel output signal representative of the voltage level of the floating diffusion node is compared with a reference voltage to identify a first control voltage level of the sequence of control voltage levels for which the voltage level of the floating diffusion node exceeds the reference voltage.

Low-noise, high dynamic-range image sensor

An image sensor architecture with multi-bit sampling is implemented within an image sensor system. A pixel signal produced in response to light incident upon a photosensitive element is converted to a multiple-bit digital value representative of the pixel signal. If the pixel signal exceeds a sampling threshold, the photosensitive element is reset. During an image capture period, digital values associated with pixel signals that exceed a sampling threshold are accumulated into image data.

Conditional-reset, multi-bit read-out image sensor

In a pixel array within an integrated-circuit image sensor, each of a plurality of pixels is evaluated to determine whether charge integrated within the pixel in response to incident light exceeds a first threshold. N-bit digital samples corresponding to the charge integrated within at least a subset of the plurality of pixels are generated, and then applied to a lookup table to retrieve respective M-bit digital values (M being less than N), wherein a stepwise range of charge integration levels represented by possible states of the M-bit digital values extends upward from a starting charge integration level that is determined based on the first threshold.

Oversampled image sensor with conditional pixel readout

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San Jose, CA, United States of America

James Edward Harris