National Semiconductor Corporation

James E Solomon

James L Dunkley

Ronald W Russell

James B Cecil

Wadie N Khadder

Jia-Tarng Wang

A process for fabricating JFET devices into a conventional CMOS monolithic IC. The combination of devices provides linear circuit operation with low noise characteristics.

Integrated CMOS process with JFET

A digital-to-analog converter having a nonlinear transfer characteristic includes a voltage divider connected in parallel with a reference voltage and a switching array connected to the voltage divider. The switching array is actuated in accordance with the digital word which is being converted to an analog signal. The voltage divider is dimensioned to provide a nonlinear transfer characteristic. The digital-to-analog circuit is also employed for performing a successive approximation analog-to-digital conversion. The voltage divider is an integrated circuit resistor formed of an elongated strip of one polarity diffused in a semiconductor substrate of the opposite polarity, and some of the switches of the array are integrated circuit switches in which a portion of the continuous strip forms one terminal thereof.

Conversion circuit

A zener diode in which the anode region of a first conductivity material is formed by diffusion in a semiconductor body, a cathode region of a second conductivity material is formed by diffusion in the semiconductor body, and the two regions are bridged by a third region extending through the two regions, the third region being a shallow layer of ion implanted doping material of said first conductivity type. In one embodiment, the anode and cathode regions are spaced-apart; in a second embodiment the cathode region is formed within the anode region. The ion implanted layer has a concentration that peaks below the surface, thus establishing the breakdown point for the avalanching of the zener diode below the surface and removed from surface contaminants such as found in the oxide surface layer.

Zener diode incorporating an ion implanted layer establishing the

An operational amplifier includes an input differential stage formed of a differential pair of transistors, a tail current source supplying that differential pair, and a pair of current source loads, each connected to a respective one of the transistors of the differential pair. A common mode feedback loop is provided from a second stage of the differential amplifier to remove any excess current supplied by the tail current source which is not drawn by the current source loads. A single capacitor is employed for assymetric frequency compensation of the second stage, such that the above described common mode feedback can be applied without producing oscillations.

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Saratoga, CA, United States of America

James E Solomon