International Business Machines Corporation

James E Dickerson

Yuen H Chan

Joseph M Mosley

Walter S Klara

Theodore William Kwap

Disclosed is a means for enhancing logic circuit performance and more particularly, for enhancing the switching speeds of a variety of logic circuits. What is involved is the insertion of a so called 'snap' or enhancement transistor connected to a common node defining an output of a basic logic circuit. In one example, the emitter of this 'snap' transistor is connected to an output node in the circuit, which in conventional practice would be charged during an upgoing transition by a fixed RC time constant. In accordance with the present improvement, however, the 'snap' transistor, due to charge stored therein, remains conducting--although the associated logic device is turned off. This current discharges as reverse base current and the output provides what appears to be an inductive voltage spike. The effect is that a temporary source of current is available to charge the common node. As a result, the transition time involved in going from one voltage level to another at the output node is substantially reduced.

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Hopewell Junction, NY, United States of America

James E Dickerson