The Mathworks, Inc.

Massachusetts Institute of Technology

James E Carrick

Biao Yu

Peter S Szpak

Xiaocang Lin

Robert Olson Aberg

Andrew C Bartlett

Allen M Waxman

Yang Feng

David A Fay

Alan N Gove

Hongbo Yang

Barry E Burke

Robert K Reich

Bernard B Kosicki

Eugene D Savoye

James A Gregory

Andrew H Loomis

William H McGonagle

Robert W Mountain

Anthony Robert Ryan

A system for providing model level protection for resources holding data accessed by multiple tasks in a model is discussed. The protection occurs at the model level so that the protection mechanism does not interfere with model dynamics. Resources concurrently accessed by multiple tasks are identified so that a unified protection mechanism can be applied to the resource. A user interface may be provided which enables the selection of a particular type of protection mechanism for the data in the resource. User supplied protection mechanisms may also be implemented.

Data transfer protection in a multi-tasking modeling environment

An embodiment can include one or more computer readable media storing executable instructions for performing execution scheduling for code generated from an executable graphical model. The media can store instructions for accessing a first code portion having a first priority, and a second code portion having a second priority, where the second priority has a relationship with the first priority. The media can store instructions for accessing target environment characteristics that indicate a performance of the target environment, and for performing execution scheduling for the first code portion and the second code portion, the execution scheduling taking into account the target environment characteristics, the execution scheduling using an execution schedule. The media can also store instructions for scheduling execution of the first code portion and the second code portion in the generated executable code based on the execution schedule, the generated executable code adapted for execution in the target environment.

Scheduling generated code based on target characteristics

When executing a graphical model of a dynamic system that includes two or more concurrently executing sets of operations, a processor is configured to create a first buffer and a second buffer within the executable graphical model. A first set of operations is configured to write data to the first buffer during a first execution instance of the first set of operations. The first set of operations is configured to write data to the second buffer during a second execution instance of the first thread. A second set of operations is configured to read the data from the first buffer during an instance of the second thread that executes contemporaneously with the second execution instance of the first set of operations. Determinations regarding access to the first buffer and second buffer by the first thread and second thread are self-contained within the first thread and second thread, respectively.

Data sharing in high-fidelity simulation and real-time multi-core execution

A tool for enabling a user, such as a programmer and a designer, to identify patterns in a program or model and to determine duplicated portions of the program or model that have the same or similar pattern is disclosed. The pattern may include the connectivity of the elements in the group as well as the attributes and parameters of the elements in the group. The tool may also enable the user to replace the duplicated portions of the program or model with a sub-program or sub-model that can be shared for the duplicated portions. Code for the sub-model may be used for the simulation or generated code for the duplicated portions of the program or model in the simulation or code generation of the program or model.

Identification of patterns in modeling environments

Implementing user-selectable concurrent access protection mechanism in a multi-tasking modeling environment

A computer-implemented method for generating code based on a graphical model may include: translating the graphical model into a graphical model code, the graphical model code including a first graphical model code function; performing a lookup of the first graphical model code function in a hardware specific library, the hardware specific library comprising a plurality of relationships between graphical model code functions and hardware specific functions, where the first graphical model code function is one of the graphical model code functions; obtaining a matched hardware specific function based on the lookup, wherein the matched hardware specific function is one of the hardware specific functions from the hardware specific library; and modifying the graphical model code based on the matched hardware specific function.

Hardware specific code generation

Data transfer protection in a multi-tasking modeling environment having a protection mechanism selected by user via user interface

A tool for enabling a user, such as a programmer and a designer, to identify patterns in a program or model and to determine duplicated portions of the program or model that have the same or similar pattern is disclosed. The tool may replace the duplicated portions of the program or model with a sub-program or sub-model that can be shared for the duplicated portions. Code for the sub-model may be used for the simulation or generated code for the duplicated portions of the program or model in the simulation or code generation of the program or model. The pattern identification may be used to establish a modeling standard or style by determining common patterns of multiple models provided by a user. The modeling standard or style can then be used to determine whether a block diagram model complies with the modeling standards or styles.

In one embodiment, a method of determining stack usage of at least a portion of a model for deployment on a target system is provided. The method may include obtaining information describing a first target system, and using the information to estimate a stack usage related to executing a representation of a component of the model on the first target system.

Determining stack usage of generated code from a model

The present invention provides a method and system for building an executable using only the necessary source modules or a reduced set of source modules. The complete list of necessary source modules can be determined by checking for dependency of any already identified necessary source modules. Hence, if any of the source modules belongs to a library, the entire library will not need to be compiled in order to use any necessary source module to build the executable. The present invention has the advantage that the executable takes shorter time to build and the executable is smaller in memory size so that it is easier to be ported to a target system. The present invention may also be used to minimize or reduce the memory needed to load a model so that only the elements/blocks that are used in the model are loaded into memory when a model loads. The present invention may further be used to minimize or reduce efforts in validating a model by creating a new library containing only the library elements/blocks that are used in the model, so that it is easy to identify which library elements/blocks need to be validated.

Automatic minimal build dependency determination and building an executable with source code

An imaging system is provided for imaging a scene to produce a sequence of image frames of the scene at a frame rate, R, of at least about 25 image frames per second. The system includes an optical input port, a charge-coupled imaging device, an analog signal processor, and an analog-to-digital processor (A/D). The A/D digitizes the amplified pixel signal to produce a digital image signal formatted as a sequence of image frames each of a plurality of digital pixel values and having a dynamic range of digital pixel values represented by a number of digital bits, B, where B is greater than 8. A digital image processor is provided for processing digital pixel values in the sequence of image frames to produce an output image frame sequence at the frame rate, R, representative of the imaged scene, with a latency of no more than about 1/R and a dynamic range of image frame pixel values represented by a number of digital bits, D, where D is less than B. The output image frame sequence is characterized by noise-limited resolution of at least a minimum number, N.sub.M, of line pairs per millimeter, referred to the charge-coupled imaging device pixel array, in an imaged scene as a function of illuminance of the input light impinging the charge-coupled imaging device pixels.

Growing community of inventors

Natick, MA, United States of America

James E Carrick