International Business Machines Corporation

James Douglas Jordan

Malcolm Scott Allen-Ware

Guillermo Jesus Silva

Jordan Ross Keuseman

Daniel Mark Dreps

Todd Jon Rosedahl

Timothy Glen Hallett

Benjamin W Mashak

Glenn Rueban Miles

Martha Broyles

Nam Huu Pham

Lloyd Andre Walls

Jose A Hejase

Rubina Firdaus Ahmed

Michael Richard Ouellette

Anand Haridass

Michael Jay Shapiro

Louis Bennie Capps, Jr

Patrick Kevin Egan

Kevin Robert Covi

Michael Lee Miller

Norman Karl James

Scott Leonard Daniels

Joel David Ziegelbein

Ronald Edward Newhart

Warren D Dyckman

Joanne Ferris

Daniel Eugene Pridgeon

A frequency band splitter is disclosed. The frequency band splitter includes a first, a second, and a third waveguides. A first narrow rectangular waveguide is utilized to connect the first waveguide to second waveguide. The first narrow rectangular waveguide has a first width to allow signals of a frequency band centered around a first frequency to be transmitted from the first waveguide to the second waveguide. A second narrow rectangular waveguide is utilized to connect the first waveguide to the third waveguide. The second narrow rectangular waveguide has a second width, which is different from the first width, to allow signals of a frequency band centered around a second frequency to be transmitted from the first waveguide to the third waveguide.

Method for performing frequency band splitting

It is determined that a current node power consumption for a node is greater than a node power cap that defines a limit of power consumption for the node. Responsive to the current node power consumption being greater than the node power cap and until the current node power consumption is less than the node power cap, power reduction operations are performed. The power reduction operations comprise determining a power management zone of a plurality of power management zones having a lowest priority among the power management zones and having a power cap greater than a minimum power cap for the power management zone. The power reduction operations further comprise setting the power cap for the power management zone to a value less than a prior value assigned as the power cap for the power management zone.

Computer program product and a node implementing power management by associated power management controllers based on distributed node power consumption and priority data

Method performed by an associated power management controller of a zone based on node power consumption and priority data for each of the plurality of zones

A zone power cap for a power management zone that defines a limit of power consumption for the power management zone is determined. The power management zone comprises a plurality of components, wherein the power management zone is associated with a controller. A set of one or more characteristics of a workload associated with the power management zone is determined. A component power cap for one or more of the plurality of components is set based, at least in part, on the set of one or more characteristics of the workload and the zone power cap.

Distributed power management system with plurality of power management controllers controlling zone and component power caps of respective zones by determining priority of other zones

A method and apparatus are provided for implementing dynamic regulator output current limiting. An input power to the regulator is measured, and the measured input power is related to a regulator output current and a regulator over current trip point, and dynamically used for providing dynamic regulator output current limiting.

Implementing dynamic regulator output current limiting

An apparatus, system, and method are disclosed for bypassing a voltage drop. A protection module allows electric current to flow from an electric power storage device to a load. The protection module prevents electric current from flowing to the electric power storage device. The protection module includes a voltage drop between the electric power storage device and the load. A power source detection module detects an absence of electric power from an electric power source. The electric power source provides electric current to the load when electric power from the electric power source is present. A bypass module bypasses the protection module and the voltage drop in response to the power source detection module detecting the absence of electric power from the electric power source. A conservation module delivers, to the load, electric current flowing through the power source detection module.

Voltage drop cancellation

An apparatus, system, and method are disclosed for a single stage hybrid charge pump. A switch module is connected to ground. An inductance module is connected between a DC voltage source and the switch module. A first capacitance module is connected to the switch and to the inductance module. A first current blocking module is connected between the DC voltage source the first capacitance module. A second capacitance module is connected to ground. A second current blocking module is connected to a node between the first capacitance module and the first current blocking module and is also connected to the second current blocking module. The switch module is operated to switch between an open state and a closed state thereby causing a voltage across the second current blocking module to increase until it is limited by a voltage limiting module.

Single stage hybrid charge pump

A system and method to optimize multi-core microprocessor performance using voltage offsets is presented. A multi-core device tests each of its processor cores in order to identify each processor core's optimum supply voltage. In turn, the device configures voltage offset networks for each processor core based upon each processor core's identified optimum supply voltage. As a result, the offset voltages produced by the voltage offset networks are subtracted from the multi-core device's main voltage, which results in the voltage offset networks supplying optimum supply voltages to each processor core. The voltage offset networks may include fuses to generate a fixed voltage offset, or the voltage offset networks may include a control circuit to dynamically adjust voltage offsets during the multi-core device's operation.

System and method to optimize multi-core microprocessor performance using voltage offsets

A method for receiving data by an integrated circuitry chip includes receiving data signals and a first clock signal sent by a sending chip. The data signals are received by data receivers and the clock signal is received by at least one clock receiver of the receiving chip. A reference voltage is derived by reference voltage circuitry for the receiving chip responsive to the first clock signal. Logical states of the received data signals are detected. The detecting includes the data receivers comparing voltage levels of the received data signals to the derived reference voltage.

Method and apparatus for supplying a reference voltage for chip-to-chip communication

A power-supply filter that is built into an integrated circuit package is disclosed. An LC, RC, or RLC filter is built into the integrated circuit's chip carrier module and connected so as to filter the power supply entering the integrated circuit. By manufacturing the filter as part of the integrated circuit package, a chip manufacturer can eliminate the need for application-level developers to provide an external filtering network in the deployment of the integrated circuit in an application circuit.

Built-in power supply filter for an integrated circuit

A method for providing a regulated core voltage to a processor within a computer system is disclosed. In accordance with a method and system of the present invention, a power supply is provided for a processor that includes multiple core transistors and multiple I/O transistors. An input voltage is supplied to a first power input of the processor for powering the I/O transistors within the processor. This input voltage is also supplied to a second power input of the processor for powering the core transistors within the processor via a voltage regulator and a resistor, with the voltage regulator and the resistor connected in parallel, such that the voltage drop across said voltage regulator can be reduced.

Method and system for providing a regulated core voltage to a processor

A printhead drive circuit to be utilized in impact printers is disclosed. In accordance with a preferred embodiment of the present invention, the printhead driver circuit includes a first switch, a set of second switches, and a decoupling circuit. The first switch is coupled between a first terminal of a DC power supply and a first terminal of a set of solenoid coils. The set of second switches is utilized to selectively energize each of the solenoid coils within the set. Each of the second switches is also respectively coupled between a second terminal of each of the solenoid coils and a second terminal of the DC power supply. The decoupling circuit is for selectively decoupling a first group of solenoid coils within the set that are not energized from a second group of solenoid coils within the set that are energized. The decoupling circuit is connected between the first terminal of the DC power supply and the second terminal of each solenoid coil via a diode at each of the second terminals of each solenoid coil.

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Round Rock, TX, United States of America

James Douglas Jordan