Cambridge Silicon Radio Limited

Cambridge Consultants Limited

Danfoss A/s

Qualcomm Technologies International, Ltd.

3com Technologies

Neul Ltd.

G. Kromschroder Aktiengesellschaft

G. Kromschroder Aktiengellschaft

James Digby Collier

Christopher Davies

Stephen John Barlow

Robert William Young

Alistair Guy Morfey

Tim Newton

Alain Henri Waha

Christopher James Fryer

Henning M Hansen

Timothy John Newton

William Webb

Ian Michael Sabberton

Karsten Westermann

Frands W Voss

Harith Haboubi

Chris Lowe

Candido Levita

Roger F Sewell

Jeffery Torrance

Matthew J Richards

Jonathan Kimmitt

Hans J&oslash;rgen Moos

Niels Per Mondrup

Richard-Jan E Jansen

A communication system comprising a base station and two or more terminals configured for communicating with the base station by means of a communications protocol, wherein: the communications protocol operates in a frequency band to which unlicensed access is permitted; and the terminals are configured for unattended operation with the base station.

Inter-device communication in a machine to machine communication network

A frequency shifter configured to shift the frequency of a signal, the frequency shifter comprising: a resonant structure configured to mechanically resonate at a first frequency; and a plurality of capacitors, each capacitor having a variable plate separation distance, wherein the resonant structure is configured to cause the plate separation distance of each capacitor to oscillate so as to cause the frequency of the signal to shift by the first frequency.

Mixer

A method and system for sharing access to a storage device. Two processing devices are connected to a storage device interface. The processing devices are interconnected to allow communication with regard to access to the storage device interface. Access to the storage device interface is controlled by the first and second processing devices exchanging signals. Embodiments of the invention may be a mobile device configured to play audio files from a memory card connected to the mobile device. A communications link may be established to a remote device for the transfer of data between devices.

Sharing of access to a storage device

A communications system includes a first and second device capable of transmitting and receiving RF communications; a controller for the first device capable of receiving or transmitting a code via a non-RF communication; a controller for the second device capable of receiving the code via a non-RF communication; and a processor for authenticating the first device for RF communication with the second device using the received code.

Authenticating devices for RF communications

A method for estimating the distance between a transmitter and a receiver, the transmitter being arranged to transmit a signal as a series of bursts, and the carrier frequency of each burst being set according to a predetermined sequence, the method comprising: forming a first series comprising the measured differences between the phases of successive bursts as received at the receiver; forming a second series comprising estimated differences between the phases of successive bursts as received at a supposed time difference between the transmitter and the receiver; and determining the quality of fit between the first series and the second series.

Distance estimation

A frequency divider circuit is provided having an even number of amplifier stages connected in series with the output of the last amplifier stage connected to the input of the first amplifier stage; and modulating means responsive to an input signal to be frequency divided, for modulating the propagation delay through each of the amplifier stages about the period of the input signal to be divided, such that when propagation through the odd amplifier stages increases, the propagation through the even amplifier stages decreases. The frequency divider circuit can be used as a pre-scaler of a radio receiver circuit.

Integrated circuit

An integrated circuit contains a microprocessor core, program memory and separate data storage, together with analog and digital signal processing circuitry. The ALU is 16 bits wide, but a 32-bit shift unit is provided, using a pair of 16-bit registers. The processor has a fixed length instruction format, with an instruction set including multiply and divide operations which use the shift unit over several cycles. No interrupts are provided. external pins of the integrated circuit allow for single stepping and other debug operations, and a serial interface (SIF) which allows external communication of test dat or working data as necessary. The serial interface has four wires (SERIN, SEROUT, SERCLK, SERLOADB), allowing handshaking with a master apparatus, and allowing direct access to the memory space of the processor core, without specific program control. Within each processor cycle, the processor circuitry is divided into plural stages, and latches are interposed between the stages to minimize power consumption.

Data processing circuits and interfaces

In a circuit arrangement for deriving the measured variable from the signals (S to S ) of at least two sensors ( ) of a flow meter, which flow meter comprises one or several parallel fluid lines ( ) and means ( ) for exciting oscillations of a predetermined fundamental frequency (&ohgr;) in the fluid line(s), the sensors ( ) detect the oscillations and the sensor signals (S to S ) are supplied by way of a respective A-D converter ( ) to a digital processing unit (P) having a computation circuit ( ), in which their phase difference (&PHgr;) is determined as a measure of the flow. In order to be largely independent of unwanted changes in the fundamental frequency (&ohgr;) of the sensor signals (S , S ), and to measure the flow with little effort and with as few errors as possible, provision is made for the processing unit (P) between the A-D converter ( ) of each sensor signal (S , S ) and the computation circuit ( ) to comprise a digital multiplier circuit (M) and a digital filter arrangement (F) downstream thereof, for the digital sensor signals (S , S ) to be multiplied in the multiplier circuit (M) with respective digital signals (I, R) phase-displaced by 90&deg; with respect to one another that represent sinusoidal oscillations of identical maximum amplitude (x) and of a frequency (&ohgr;&plus;&Dgr;&ohgr;) that varies by a slight difference frequency (&Dgr;&ohgr;) from the fundamental frequency (&ohgr;), and for the pass band of the filter arrangement (F) to be matched to the difference frequency (&Dgr;&ohgr;).

Circuit arrangement for deriving the measured variable from the signals of sensors of a flow meter

A decision feedback encoder comprising an analog-to-digital converter for converting an input signal into digital signals representing decision levels, digital processing circuits responsive to signals from the converter for providing a succession of symbol values and a set of coefficients, digital-to-analog converters for converting the coefficients into corresponding analog values and analog circuits for forming a sum of the products of each of the symbol values and a respective one of said analog values to provide a feedback signal for the reduction of inter-symbol interference in the input signal.

Data receiver including hybrid decision feedback equalizer

An integrated circuit contains a microprocessor core, program memory and separate data storage, together with analogue and digital signal processing circuitry. The ALU is 16 bits wide, but a 32-bit shift unit is provided, using a pair of 16-bit registers. The processor has a fixed length instruction format, with an instruction set including multiply and divide operations which use the shift unit over several cycles. No interrupts are provided. External pins of the integrated circuit allow for single stepping and other debug operations, and a serial interface (SIF) which allows external communication of test data or working data as necessary. The serial interface has four wires (SERIN, SEROUT, SER-CLK, SERLOADB), allowing handshaking with a master apparatus, and allowing direct access to the memory space of the processor core, without specific program control. Within each processor cycle, the processor circuitry is divided into plural stages, and latches are interposed between the stages to minimize power consumption.

A fluid flow meter comprises a pair of transducers spaced apart in the direction of fluid flow. A transmitter causes acoustic signals to be transmitted in both directions through the fluid by the transducers. A processor determines information relating to the fluid flow by monitoring the time of flight of acoustic signals received by the transducers. Part of the space between the transducers defines a flow path consisting of a flow structure having a plurality of parallel fluid flow passages which extend axially in the direction of flow, wherein the cross-sectional diameters of the passages are chosen such that substantially plane acoustic waves only are transmitted through the passages by the fluid, and wherein under working conditions that fluid flows through each passage such that the ratio of the volume flow rate through the passage to the total volume flow rate remains substantially constant with respect to the total volume flow rate.

Fluid flow meter

Frequency synthesizer

Sub-ranging analogue to digital converter using differential signals and

Growing community of inventors

Cambridge, United Kingdom

James Digby Collier