International Business Machines Corporation

James David Greenfield

Agnes Yee Ngai

Barbara A Hall

Edward Francis Westermann

John Mark Kaczmarczyk

John M Sutton

Stephen Philip Pokrinchak

Diane Marie Mauersberg

Charles E Boice

William Robert Taylor

John A Murdock

Matthew J Mitchell, Jr

Plural encoders operating in parallel to achieve a desired data rate have their respective outputs combined by an autonomously operating arrangement for transfer of data to a direct memory access arrangement from respective encoders in order in response to a signal asserted upon completion of encoding and output of encoded data corresponding to a predetermined portion of input data. Buffering of encoder output can be either internal or external to the encoders. Zero bytes which may be inherently generated at the beginning and end of an encoder output stream may be suppressed to improve encoded signal quality and efficiency.

Cascaded output for an encoder system using multiple encoders

A digital video encoder is presented adapted for dynamically switching between sets of quantizer matrix tables without pausing encoding of a stream of video data. Two or more sets of quantizer matrix tables are held at the encoder's quantization unit and compressed store interface for dynamically switching between sets of quant matrix tables at a picture boundary of the sequence of video data, i.e., without stopping encoding of the sequence of video data. Further, while one set of matrix tables is being employed to quantize the stream of video data, the encoder can be updating or modifying another set of quantization matrix tables, again without stopping encoding of the sequence of video data.

Dynamically switching quant matrix tables within an MPEG-2 encoder

A technique is provided for programmably vertically filtering pixel values of frames of a sequence of video frames. The technique includes separating luminance components and chrominance components of the pixel values within a vertical filter buffer, then vertically filtering luminance components of the pixel values using programmable luminance filter coefficients, and vertically filtering chrominance components of the pixel values using programmable chrominance filter coefficients. The filtered luminance component data and filtered chrominance component data is subsequently merged onto a single luminance/chrominance bus for further filtering and/or encoding. The luminance and chrominance filter coefficients are programmable and may be changed dynamically and repeatedly at picture boundaries. In one embodiment, the programmable vertical filter includes a four tap luminance component filter and a five tap chrominance component filter.

Programmable vertical filter for video encoding

Method and encoder for encoding a digital video image stream. The encoding includes spatial compression of still images in the video stream and temporal compression between the still images. The spatial compression is carried out by converting a time domain image of a macroblock to a frequency domain image of the macroblock, taking the discrete cosine transform of the frequency domain image, transforming the discrete cosine transformed macroblock image by a quantization factor, and run length encoding the quantized discrete cosine transformed macroblock image. The temporal compression is carried out by reconstructing the run length encoded, quantized, discrete cosine transformed image of the macroblock, searching for a best match macroblock, and constructing a motion vector between them. This forms a bitstream of run length encoded, quantized, discrete cosine transform macroblocks and of motion vectors. This bitstream is passed to and through an external buffer to a transmission medium. The number encoded bits read by a host from the external buffer is fed back to the encoder for calculation in real time of a dynamic buffer level indicator indicative of the fullness of the external buffer. The encoder may generate a BUFFEREMPTY flag, BUFFERALMOSTFULL flag and/or BUFFERFULL flag for the host.

On-chip dynamic buffer level indicators for digital video encoder

Simultaneous vertical spatial filtering and chrominance conversion is achieved with reduced data buffering and simplified filtering circuits by using a single filter stage and hybrid filter coefficients. Data latency is reduced and performance requirements are reduced while avoiding critical signal propagation paths. The filter and buffers are fully compatible with any scan format having consecutively presented lines of image data, including both progressive and interlaced scan formats.

Simultaneous vertical spatial filtering and chroma conversion in video images

A technique is provided for programmably controlling output of compressed data from, for example, a video encoder. The technique can be implemented within the video encoder and includes buffering the compressed data in a write buffer, followed by transferring the compressed data from the write buffer to a read buffer. At least one programmable output mode is provided for selectively controlling output of the compressed data from the read buffer. When the read buffer is full, the compressed data is stored to the encoder's external memory to await transfer to the read buffer. The at least one programmable mode can include a slave mode, a gated master mode, a multi-cycle speed mode, and a paced master mode, which may be employed individually or in combination. A mechanism for inserting pad bytes of data into the compressed data is also provided.

Programmable output control of compressed data from encoder

A method of encoding interlaced, full motion digital video image data. The digital video image data has two interlaced fields per frame with luminance and chrominance components, where the chrominance components are uncorrelated between adjacent fields. The method encompasses applying one field of chrominance information to both luminance fields of a frame. This encodes chrominance components at one quarter the spatial resolution of the luminance components.

Apparatus for color component compression

A method for compensating for reduced picture quality when combining a multi-chip encoding chipset into a single integrated semiconductor IC. The method includes additional functions provided on the single IC to compensate for the negative effects on picture quality produced as a result of rounding 8 bit luminance pixel data to 5 bits, where the luminance data values are supplied as input to the search function. The additional functions are collectively referred to as motion biasing and are applied to influence the choice of a 'best match' motion type, which is well known in the art. The biasing is performed by the addition of a weight factor to a total difference result that is calculated by the search function. The biasing is applied only for the purpose of influencing the choice of a reference frame that is not necessarily the frame which produces an optimal motion vector, but rather will result in using fewer bits to encode macroblocks.

Motion estimation architecture for area and power reduction

Method and apparatus for encoding a digital video image stream in an encoder. The encoding includes spatial compression of still images in the digital video image stream and temporal compression between the still images. The spatial compression is carried out by converting a time domain image of a macroblock to a frequency domain image of the macroblock, taking the discrete cosine transform of the frequency domain image, transforming the discrete cosine transformed macroblock image by a quantization factor, and run length encoding the quantized discrete cosine transformed macroblock image. The temporal compression is carried out by reconstructing the run length encoded, quantized, discrete cosine transformed image of the macroblock, searching for a best match macroblock, and constructing a motion vector between them. This forms a bitstream of runlength encoded, quantized, discrete cosine transformed macroblocks and of motion vectors. This bitstream is passed to and through a FIFO buffer to a transmission medium. The number of run length encoded bits is fed back to the encoder for calculation of the quantization factor, to thereby avoid overrunning the buffer and interrupting the transmission.

FIFO feedback and control for digital video encoder

A method for encoding bitstream headers in a processor where templates for the bitstream header are stored in a processor buffer. The templates are addressable by programmable instructions, and the processor has a status register containing a bit for each header type. The status register is modifiable during the encoding process with a data pattern indicating the headers needed for encoding with the bitstream. In this way when a bit is set to 1 the predefined header type is generated and shipped to the bitstream. The header is generated by processing the header buffer template entries associated with the header type.

Apparatus for header generation

An apparatus for intersystem I/O channel paging. The I/O channel through an I/O channel adapter provides communication between a central processor, an I/O processor, and a shared electronic storage device. The central processor and I/O processor are each enabled for recognizing specific instructions. The intersystem channel may be implemented in the form of a page chain table. Either process is capable of constructing a page chain table in the shared electronic storage device, upon receipt of appropriate instructions. The central processor or I/O processor signals the I/O channel adapter with identification of a page chain table to select. The I/O channel adapter fetches table entries and executes the table. The I/O channel adapter initiates I/O activity upon execution of the table. The I/O channel is not dependent upon the central processor or I/O processor for fetching or executing instructions, rather it acts independent of the processors once the page chain table is created. Flags set in the table serve as a disconnection mechanism for the I/O channel paging system. The I/O channel paging mechanism may operate synchronously or asynchronously.

Growing community of inventors

Binghamton, NY, United States of America

James David Greenfield