Freescale Semiconductor,inc.

Nxp Usa, Inc.

James Cotronakis

Jonathan K Abrokwah

Jason R Fender

Eduard Jan Pabst

Jose Luis Suarez

Terry K Daly

Keri L Costello

Adolfo G Reyes

Interconnected substrate arrays, microelectronic packages, and methods for fabricating microelectronic packages for fabricating microelectronic packages utilizing interconnected substrate arrays containing integrated electrostatic discharge (ESD) protection grids are provided. In an embodiment, the method includes obtaining an interconnected substrate array having an integrated ESD protection grid. The ESD protection grid includes, in turn, ESD grid lines at least partially formed in singulation streets of an interconnected substrate array and electrically coupling die attachment regions of the substrate array to one or more peripheral machine ground contacts. Array-level fabrication steps are performed to produce an interconnected package array utilizing the interconnected substrate array, while electrically coupling the die attachment regions to electrical ground through the ESD protection grid during at least one of the array-level fabrication steps. Afterwards, the interconnected package array is singulated to yield a plurality of singulated microelectronic packages.

Interconnected substrate arrays containing electrostatic discharge protection grids and associated microelectronic packages

According to one aspect of the present invention, a method of forming a microelectronic assembly, such as an integrated passive device (IPD) (), is provided. An insulating dielectric layer () having a thickness () of at least 4 microns is formed over a silicon substrate (). At least one passive electronic component () is formed over the insulating dielectric layer ().

Integrated passive device with a high resistivity substrate and method for forming the same

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Chandler, AZ, United States of America

James Cotronakis