Stmicroelectronics Gmbh

National Semiconductor Corporation

James Chow

Kenny Wen

G&uuml;nter W Steinbach

Larry W DeClue

Khin Lay

An electronic circuit includes a selectively configurable differential signal interface and a selection control input for selecting one of a plurality of standard differential signal interfaces for configuration of the differential signal interface. The selection control input selects one of the following plurality of standard differential signal interfaces: reduced swing differential signaling (RSDS), low voltage differential signaling (LVDS), mini low voltage differential signaling (mini-LVDS), and bussed low voltage differential signaling (BLVDS), for configuration of the differential signal interface. The electronic circuit may also include a plurality of selectable voltage sources () and a plurality of selectable current sources (), for selecting, in response to an input signal at the selection control input, at least one of an operating D.C. voltage, a standard differential signal voltage, and a standard differential signal current for the differential signal interface.

Versatile RSDS-LVDS-miniLVDS-BLVDS differential signal interface circuit

A closed loop delay line system () includes a phase lock loop that provides a phase lock output signal (). A delay line () includes a clock input, a delay line output, and a delay line bias input. A bias signal provided to the delay line bias input () adjusts the speed of the delay line (). A phase detector () compares phase between a first timing signal input () and the delay line output (). A bias adjust circuit () mixes the phase compare output signal () and the phase lock output signal () to provide a combination bias signal () to the delay line (). Additionally, the relative timing position of strobe outputs () from the delay line () can be individually adjusted.

Precision closed loop delay line for wide frequency data recovery

An electronic circuit includes a selectively configurable differential signal interface and a selection control input for selecting one of a plurality of standard differential signal interfaces for configuration of the differential signal interface. The selection control input selects one of the following plurality of standard differential signal interfaces: reduced swing differential signaling (RSDS), low voltage differential signaling (LVDS), mini low voltage differential signaling (mini-LVDS), and bussed low voltage differential signaling (BLVDS), for configuration of the differential signal interface. The electronic circuit may also include a plurality of selectable voltage sources ( ) and a plurality of selectable current sources ( ), for selecting, in response to an input signal at the selection control input, at least one of an operating D.C. voltage, a standard differential signal voltage, and a standard differential signal current for the differential signal interface.

An analog-to-digital converter (ADC) ( ) for sampling high speed video signals includes Pre-amplifiers ( ) electrically coupled to Post-amplifiers ( ) that are electrically coupled to output latches ( and ). A sampling clock signal ( ) clocks the output latches ( and ) to sample an input analog electronic signal to provide a digital representation thereof. The ADC ( ) includes an auto-zeroing function to cancel bias voltages at the Post-amplifiers ( ) during a video signal horizontal blanking time period. The ADC ( ) includes a bit dithering function by alternating sets of reference voltages into the Pre-amplifiers ( ) increasing bit resolution. The ADC ( ) includes wired interconnect interpolation between the Pre-amplifiers ( ) and Post-amplifiers ( ) and between the Post-amplifiers ( ) and the output latches ( and ).

Video analog-to-digital converter

A low voltage differential signaling (&ldquo;LVDS&rdquo;) line driver includes a pre-emphasis circuit to increase the drive capability of the LVDS line driver. A current source provides a first drive current to a current steering circuit. The pre-emphasis circuit includes a second current source, a current sourcing circuit coupled to the second current source and the current steering circuit and a current sinking circuit coupled to the second current source and the current steering circuit. In this way, first and second drive currents are provided to during the switching of the signal states of an input signal, so that more drive current is supplied to the output of the LVDS line driver circuit. Thus, the time it takes for the current steering circuit to switch the drive current between the first and second directions is decreased.

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Palo Alto, CA, United States of America

James Chow