Rockwell Scientific Licensing LLC

Innovative Technology Licensing LLC

Teledyne Licensing, LLC

James Chingwei Li

Berinder P S Brar

John A Higgins

Richard L Pierson, Jr

A method for fabricating an HBT is disclosed, wherein successive emitter, base, collector and sub-collector epitaxial layers are deposited on a substrate, with the substrate being adjacent to the sub-collector layer. The epitaxial layers are etched to provide locations for contact metals and emitter, base and contact metals are deposited on the emitter, base and sub-collector epitaxial layers, respectively. A self-alignment material is deposited on the surface of the substrate around the epitaxial layers and a planarization material is deposited on and covers the top surface of the HBT. The planarization material is then etched so it has a planar surface about the same level as the surface of the self-alignment material and the contact metals protrude from the planar surface. The planar metals are then deposited over the protruding portions of the contact metals.

Heterojunction bipolar transistor with dielectric assisted planarized contacts and method for fabricating

Test probe pads are located lateral to, and spaced from, the emitter, base or collector region of a bipolar transistor, preferably on separate pedestals, and connected to their respective transistor regions by air bridges. The probe pads, transistor contacts and air bridges are preferably formed as common metallizations. In the case of an HBT, a gap in the subcollector below the air bridges insulates the test transistor from capacitor loading by the probe pads. The test transistors can be used to characterize both themselves and functional circuit transistors fabricated with the same process on the same wafer by testing at an intermediate stage of manufacture, thus allowing wafers to be discarded without completing the manufacture if their transistors do not meet specifications.

Bipolar transistor test structure with lateral test probe pads

A heterojunction bipolar transistor (HBT) is disclosed that includes successive emitter, base and collector and sub-collector epitaxial layers and emitter, base and collector contact metals contacting the emitter, base and sub-collector layers respectively. A passivation material is included that covers the uncovered portions of the layers and covers substantially all of the contact metals. The passivation material has a planar surface and a portion of each of the contact metals protrudes from the surface. Planar metals are included on the planar surface, each being isolated from the others and in electrical contact with a respective contact metal. A method for fabricating an HBT is also disclosed, wherein successive emitter, base, collector and sub-collector epitaxial layers are deposited on a substrate, with the substrate being adjacent to the sub-collector layer. The epitaxial layers are etched to provide locations for contact metals and emitter, base and contact metals are deposited on the emitter, base and sub-collector epitaxial layers, respectively. A self-alignment material is deposited on the surface of the substrate around the epitaxial layers and a planarization material is deposited on and covers the top surface of the HBT. The planarization material is then etched so it has a planar surface about the same level as the surface of the self-alignment material and the contact metals protrude from the planar surface. The planar metals are then deposited over the protruding portions of the contact metals.

A bipolar junction transistor (BJT) requires the fabrication of a BJT structure and of a support post which is adjacent to, but physically and electrically isolated from, the BJT structure. The BJT structure includes a semi-insulating substrate, a subcollector, a collector, a base, and an emitter. Metal contacts are formed on the subcollector and emitter to provide collector and emitter terminals. Contact to the structure's base is accomplished with a metal contact which extends from the top of the support post to the edge of the base nearest the support post. The contact bridges the physical and electrical separation between the support post and the base and provides a base terminal for the device. The base contact need extend over the edge of the base by no more than the transfer length associated with the fabrication process. This results in the smaller base contact area over the collector than would otherwise be necessary, and a consequent reduction in base-collector capacitance. The invention is particularly useful when forming heterojunction bipolar transistors (HBTs), built on a compound semiconductor substrate such as indium phosphide (InP).

Mechanically-stable BJT with reduced base-collector capacitance

A BJT device configuration includes an emitter finger and via arrangement which reduces emitter finger width, and is particularly suitable for use with compound semiconductor-based devices. Each emitter finger includes a cross-shaped metal contact which provides an emitter contact; each contact comprises two perpendicular arms which intersect at a central area. A via through an interlevel dielectric layer provides access to the emitter contact; the via is square-shaped, centered over the center point of the central area, and oriented at a 45&#xb0; angle to the arms. This allows the via size to be equal to or greater than the minimum process dimension, while allowing the width of the emitter finger to be as narrow as possible with the alignment tolerances still being met.

BJT device configuration and fabrication method with reduced emitter width

A testing apparatus for determining the etch bias associated with a semiconductor-processing step includes a substrate, a first cathode finger with a first width on the substrate, a second cathode finger with a second width on the substrate, and a cathode large area on the substrate wherein the cathode large area has a third width W&Prime; and a length L&Prime; that are both substantially larger than either of the first and second widths.

Testing apparatus and method for determining an etch bias associated with a semiconductor-processing step

A thin InGaAs contact layer is provided for the collector of a heterojunction bipolar transistor (HBT) above an InP sub-collector. The contact layer provides a low resistance contact mechanism and a high thermal conductivity path for removing device heat though the sub-collector, and also serves as an etch stop to protect the sub-collector during device fabrication. A portion of the sub-collector lateral to the remainder of the HBT is rendered electrically insulative, preferably by an ion implant, to provide electrical isolation for the device and improve its planarity by avoiding etching through the sub-collector.

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San Diego, CA, United States of America

James Chingwei Li