National Semiconductor Corporation

James Charles Schmoock

Jeffrey P Kotowski

Jeff Kotowski

John Philip Parry

A multiple over current protection circuit for regulating current through an analog switch coupled between a power supply and a load. In a first circuit, a comparator monitors a voltage drop across the analog switch. When the voltage drop exceeds a reference voltage, the comparator momentarily activates a first transistor and causes an amplifier to enter a current limiting mode. The activated first transistor causes the analog switch to momentarily turn off. In a second circuit, the comparator activates a second transistor. During the current limiting mode of the amplifier, a constant voltage is maintained at the source of the second transistor and the load side of the analog switch. A current source draws a current through the second transistor. Also, the current flowing through the analog switch tracks the current flowing through the second transistor.

Apparatus and method for over-current protection of an analog switch

A linear regulator includes an amplifier that provides a control signal in response to a comparison between a feedback signal and an output signal. A pass element in the regulator selectively couples power from an unregulated power signal to an output node in response to the control signal. A compensation circuit that includes negative gain is arranged to provide the feedback signal in response to an output signal at the output node. In one example, the compensation circuit includes an inverting amplifier that provides an intermediary signal in response to the output signal, and the intermediary signal is coupled to a feedback network that provides the feedback signal. In another example, the compensation circuit includes an inverting amplifier that cooperates with a feedback network to provide the feedback signal. The closed-loop transfer functions of the compensation circuits provide a feed-forward zero that enables stable operation of the LDO regulator.

Linear regulator compensation inversion

An integrated circuit including one or more power devices, and circuitry which reliably (and independently) shuts down each power device that is detected to be in an undesired operating condition (e.g., one or both of an overcurrent condition and an overvoltage condition) that causes a thermal fault, but which does not shut down any power device that is not in such undesired operating condition. In typical implementations in which the integrated circuit has multiple power devices and an overvoltage detection circuit for each power device, the integrated circuit includes a thermal fault detection circuit and logic circuitry which receives the output of the thermal fault detection circuit and each overvoltage detection circuit. The logic circuitry generates signals which shut down appropriate ones of the power devices in response to the thermal fault detection and overvoltage detection signals it receives. The integrated circuit also includes fail safe thermal shutdown circuitry which shuts down all power devices upon detecting a more severe thermal fault even when no overcurrent or overvoltage condition is detected. In some embodiments, when a thermal fault is detected, each power device that is in an overcurrent and/or overvoltage condition (but none of the power devices that is in neither an overcurrent nor an overvoltage condition) is shut down. All the power devices are shut down upon detection of a more severe thermal fault even when no overcurrent or overvoltage condition is detected.

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Granite Bay, CA, United States of America

James Charles Schmoock