Bell Telephone Laboratories

James C North

Andrew H Bobeck

Adrian R Hartman

Peter W Shackle

Bernard T Murphy

George W Reutlinger

David P Schinke

Magnetic devices exemplified by bubble devices depend upon functional magnetic layers initially produced by epitaxy and reduced to effectively thinned surface layers by ion implantation. Implantation is at well-defined energy spectral levels which minimize effect on surface layers and which predominantly affect a 'buried layer'. As a result, such affected layer acts as a boundary layer of a functional layer which is spaced away from an interface between a substrate and a deposited layer. Commercial significance is primarily concerned with high bit density devices in which effectively thinned regions are less than 3 micrometers in thickness.

Magnetic devices and method of manufacture

A silicon photodetector capable of long wavelength response which includes means for aligning an optical fiber for edge illumination. The detector is formed in a silicon body (11 and 12) with major surfaces lying in the (110) plane. A groove (23) is etched in the body adjacent the detector to produce sidewalls (24) and an end wall (25) lying in (111) planes. The sidewalls form a v-shaped groove with a depth precisely determined by the width of the groove so that an optical fiber (26) placed in the groove is vertically aligned with the detector. The end wall is perpendicular to the surface of the body so that light from the fiber is not refracted from the plane of the detector.

Edge illuminated photodetector with optical fiber alignment

Disclosed is a method of isolating portions of integrated circuits which permits closely packed structures. A semiconductor wafer is provided with a substrate of one conductivity type, a first layer of opposite conductivity type and high impurity concentration formed thereon, and a second layer of either conductivity type but lower concentration formed over the first layer. The major surfaces of the semiconductor layers are parallel to the (110) plane. Narrow grooves with sidewalls in the (111) plane are etched into the first layer. A shallow diffusion of impurities of the same conductivity type as the first layer is performed in the sidewalls and bottom of the grooves which permits the first layer to be contacted from the surface of the second layer. The groove is then etched further until it extends into the underlying substrate. Impurities of the same conductivity type as the substrate are diffused into the bottom and sidewalls of the grooves. The concentration of these impurities is chosen so that a chanstop region is formed in the substrate without appreciably affecting electrical conductivity between the first layer and the regions formed by the previous diffusion.

Isolation of integrated circuits utilizing selective etching and

Disclosed are dielectrically isolated high voltage planar devices and methods of fabricating such devices. The devices are designed so that the large electric fields at the junction edges are significantly reduced; thereby permitting a closely packed structure. This concept may be achieved by forming narrow grooves at the junctions and filling with a thermally grown oxide. In a preferred embodiment, the surface of the devices lies in the (110) plane so that the walls of the grooves are perpendicular thereto in the (111) plane. Fabrication includes bonding the semiconductor wafer to a substrate with an oxide layer therebetween and forming grooves through the wafer to the oxide layer for isolation from device to device.

Growing community of inventors

New Providence, NJ, United States of America

James C North