Eaton Corporation

James A Benjamin

Herman P Schutten

Robert W Lade

Lyle O Hoppie

Steven R Schachameyer

John B Pardee

Gordon B Spellman

Stanley V Jaskolski

Stanley V Jasolski

A semiconductor processing technique is disclosed for forming a multi-layered semiconductor structure in a single chamber and with the same equipment, without removing the semiconductor wafer substrate or otherwise transferring it to another chamber. A gaseous mixture of different gases is provided in a chamber. Excimer pulsed ultraviolet laser radiation is introduced into the chamber at a first discrete wavelength to photolytically react with a first of the gases at a discrete excitation energy photochemically breaking bonds of the first gas to epitaxially deposit a first layer on the substrate, followed by radiation at a second discrete wavelength to photolytically react with a second gas to deposit a second layer on the first layer, and so on. The different gases may be introduced into the chamber collectively, or serially between radiations. Scavenging between layers is provided by photolytic removal of surface containments and the products of reaction.

Multi-layer semiconductor processing with scavenging between layers by

MOMOM structural geometry and fabrication techniques are disclosed. A first oxidizable metal strip (3) and a second coplanar nonoxidizable metal strip (6) are deposited on an insulating substrate (2). An insulating layer (12) is deposited on the metal strips, followed by deposition of a third nonoxidizable metal layer. A generally vertical notch (14) is cut through the layers to the substrate providing left and right sections (15, 16) of the third metal layer, left and right sections (19, 20) of the insulating layer, and the first and second metal layers with facing edges (23, 24) spaced by the notch therebetween. An oxidized tip (25) is formed at the facing edge of the first metal layer. A fourth metal layer (26) is ballistically deposited over the oxidized tip and the left section of the third metal layer, using the notch edge of the right section of the third metal layer as a shadow mask, followed by oxidization of the fourth metal layer. A fifth horizontal metal layer (30) is ballistically deposited by a vertically columnated beam along the substrate across the bottom (28) of the notch between the oxidation layer on the fourth metal layer and the facing edge (24) of the second metal layer. The M-O-M-O-M structure is provided by the first metal layer (3)--the oxidized tip (25)--the fourth metal layer (26) at a generally vertical portion (39)--the oxidation layer (29) on the fourth metal layer at a generally vertical portion (41)--the fifth metal layer (30) and the second metal layer (6).

Method for making horizontally layered momom tunnel device

MOMOM structural geometry and fabrication techniques are is disclosed. First and second metal layer strips (6 and 10) are supported on an insulating substrate (4) and have vertically overlapped portions sandwiched between insulating layers (8, 12). A generally vertical side (18) is defined through the layers to the substrate to expose vertical edges (20, 24) of the metal layers which are oxidized (32, 34) and covered by a third metal layer (44) extending therebetween. In the preferred embodiment, the middle insulating layer (8) is undercut (28), oxidized (36, 40), and filled with metallization (50), to provide a vertical rectilinear conduction path.

Method for making vertically layered MOMOM tunnel device

A semiconductor ion implantation processing technique is disclosed for implanting high purity, high flux density ions in a semiconductor wafer substrate. A reactant gas is irradiated with excimer pulsed ultraviolet laser radiation at a discrete designated pulsed wavelength corresponding to a discrete designated ionization excitation energy of the gas photochemically breaking bonds of the gas to nonthermally photolytically ionize the gas. The ions are then accelerated by an electric field for subsequent implantation into a surface.

Generating high purity ions by non-thermal excimer laser processing

A power JFET (2) has a stack (4) of alternating conductivity type layers (5-9) forming a plurality of channels (6, 8). The JFET has an ON state conducting bidirectional current horizontally through the channels. The channels are stacked vertically, and the JFET has an OFF state blocking current flow through the channels due to vertical depletion pinch-off. Various main and gate terminal and drift region structures are disclosed.

Multi-channel power JFET with buried field shaping regions

A semiconductor processing technique is disclosed for periodically selectively effecting lattice ordering and dopant distribution during a semiconductor layer formation process. Excimer pulsed ultraviolet laser radiation is provided at different energy fluxes to provide an electrically active layer as formed, without post-annealing, and curing lattice damage otherwise due to certain processing methods such as ion implantation. In a photolytic deposition technique, excimer laser radiation is periodically increased to transiently provide a pyrolytic thermal reaction in the layer as thus far deposited to provide a plurality of short intermittent periodic annealing steps to ensure crystallization as the layer continues to be deposited at lower radiation energy fluxes. Single crystalline material may be formed without post-annealing by periodically irradiating incremental thicknesses of the layer as formed.

Semiconductor processing technique with differentially fluxed radiation

A dopant gettering semiconductor processing technique is disclosed for selectively activating an otherwise benign reactant to remove dopant from a semiconductor wafer substrate. Excimer pulsed ultraviolet laser radiation is provided at a discrete designated pulsed wavelength corresponding to a discrete designated gettering excitation energy of the otherwise benign reactant photochemically breaking bonds of the reactant such that the reactant is photolytically activated to remove dopant from the substrate, without thermally driven pyrolytic reaction. The bonds of a reactant gas are photochemically broken to produce gettering agents reacting with the substrate to remove dopant by forming a gaseous compound liberated from the substrate and benign to and unactivated by the discrete designated wavelength of the excimer pulsed ultraviolet laser radiation.

Dopant gettering semiconductor processing by excimer laser

A semiconductor processing technique is disclosed for reasonantly reacting with a semiconductor wafer substrate and cleaving surface atomic bonds to create dangling bonds. The substrate is irradiated with excimer pulsed ultraviolet laser radiation at a discrete designed wavelength to resonantly photolytically cleave surface bonds and create the dangling bonds. This enhances further processing operations such as single crystalline silicon deposition and enhanced bonding and growth thereof.

Semiconductor processing technique for generating dangling surface bonds

MOMOM structural geometry and fabrication techniques are disclosed. First and second metal layer strips (6 and 10) are supported on an insulating substrate (4) and have vertically overlapped portions sandwiched between insulating layers (8, 12). A generally vertical side (18) is defined through the layers to the substrate to expose vertical edges (20, 24) of the metal layers which are oxidized (32, 34) and covered by a third metal layer (44) extending therebetween. In the preferred embodiment, the middle insulating layer (8) is undercut (28), oxidized (36, 40), and filled with metallization (50), to provide a vertical rectilinear conduction path.

Vertically layered MOMOM tunnel device

A power JFET (2) has a common drift region (4) between split first and second longitudinally separated sets of rows (6, 8) of alternating conductivity type layers (10-20 and 21-31) forming a plurality of channels (11, 13, 15, 17, 19, 22, 24, 26, 28 and 30). The JFET has an ON state conducting bidirectional current horizontally longitudinally through the common drift region and the channels. The JFET has an OFF state blocking current flow through the channels due to horizontally lateral depletion pinch-off. The layers of the rows extend vertically and horizontally longitudinally such that the direction of layering extends horizontally laterally. Particular gate structure is disclosed.

Split row power JFET

A power JFET (2) has a common drift region (4) between a pair of spaced first and second stacks (6, 8) of alternating conductivity type layers (10-14 and 15-19) forming a plurality of channels (11, 13, 16 and 18). The JFET has an ON state conducting bidirectional current horizontally through the common drift region and the channels. The channels are stacked vertically, and the JFET has an OFF state blocking current flow through the channels due to vertical depletion pinch-off. Field shaping and high blocking voltage capability are provided. Particular main terminal and gate structure is disclosed.

Dual stack power JFET with buried field shaping depletion regions

MOMOM structural geometry and fabrication techniques are disclosed. A first oxidizable metal strip (3) and a second coplanar nonoxidizable metal strip (6) are deposited on an insulating substrate (2). An insulating layer (12) is deposited on the metal strips, followed by deposition of a third nonoxidizable metal layer. A generally vertical notch (14) is cut through the layers to the substrate providing left and right sections (15, 16) of the third metal layer, left and right sections (19, 20) of the insulating layer, and the first and second metal layers with facing edges (23, 24) spaced by the notch therebetween. An oxidized tip (25) is formed at the facing edge of the first metal layer. A fourth metal layer (26) is ballistically deposited over the oxidized tip and the left section of the third metal layer, using the notch edge of the right section of the third metal layer as a shadow mask, followed by oxidization of the fourth metal layer. A fifth horizontal metal layer (30) is ballistically deposited by a vertically columnated beam along the substrate across the bottom (28) of the notch between the oxidation layer on the fourth metal layer and the facing edge (24) of the second metal layer. The M-O-M-O-M structure is provided by the first metal layer (3)-the oxidized tip (25)-the fourth metal layer (26) at a generally vertical portion (39)-the oxidation layer (29) on the fourth metal layer at a generally vertical portion (41)-the fifth metal layer (30) and the second metal layer (6).

Horizontally layered MOMOM notch tunnel device

A solid display is provided by a semiconductor switched between transparent and opaque conditions according to external removal of carriers from the conduction band for controlling absorption of light-energy. A semiconductor has an energy band gap affording a normally saturated conduction band in response to impinging light energy of a given range wavelength. The normally saturated condition of the semiconductor prevents further absorption, and enables light to pass thererthrough. The semiconductor is switched to an opaque condition by completing an electric circuit for removing carriers from the conduction band to enable further absorption of incident light in the semiconductor by raising additional carriers from the valence band to the conduction band.

Solid state display

A lateral bidirectional power FET (2) has a common drift region (6) between first and second stacks (8, 10) of alternating conductivity type layers (12-17 and 18-23). A notch (38) extends vertically downwardly into the drift region and laterally separates the stacks above the drift region. The stacks include a plurality of channel-containing regions (12-14 and 18-20) interleaved with a plurality of source regions (15-17 and 21-23). In the ON state, bidirectional current flows serially through the source regions and channels of each stack and through the drift region. In the OFF state, voltage is dropped across the plurality of junctions in series in the stacks, and the respective junctions with the drift region.

Lateral bidirectional power FET with notched multi-channel stacking and

Lateral planar FET structure (2) is disclosed for bidirection power switching, including AC application. Voltage blocking capability is enhanced in the lateral current flow device (2) by field shaping in the drift region (22). In the OFF state, the field shaping region (24) straightens field lines and prevents gradient induced depletion and unwanted inversion of conductivity type along a lateral drift region portion (54) extending beneath a top major surface (28) of the substrate between channel-containing regions (6) and (8).

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Waukesha, WI, United States of America

James A Benjamin