Synopsys, Inc.

Jaime Wong

Brent L Gregory

William Clark Naylor, Jr

Philip H Tai

Bogdan Craciun

Pedja Raspopovic

A method of optimizing a netlist for a circuit comprising identifying a logic tree with a single output and a plurality of interchangeable inputs, and calculate the optimal permutation of the plurality of inputs. The method further comprising modify the netlist based on the optimal permutation, and optimizing the modified netlist.

Optimizing the ordering of the inputs to large commutative-associative trees of logic gates

A system and method for generating physical design of an integrated circuit, based on schematic design. The system includes graphical user interface and integrated circuit design and layout system. The integrated circuit design and layout system creates and analyzes logical slices of the integrated circuit based on the schematic design; creates and edits macros based on the logical slices; and traces and analyzes data paths through the physical design based on the schematic design. The method includes providing the schematic design of the integrated circuit, and generating logical slices of the integrated circuit from the schematic design. The method also includes generating, grouping and manipulating macros, responsive to identification of multiple occurrences of logical slices. The method further includes performing data flow analysis to identify data paths for the physical design, quantifying weight indices for the data paths, and positioning objects in the physical design based on the weight indices.

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San Jose, CA, United States of America

Jaime Wong