Texas Instruments Corporation

Cornell Research Foundation Inc.

Koninklijke Philips Corporation N.v.

Lucent Technologies Inc.

Agere Systems Inc.

Jaiganesh Balakrishnan

Anuj Batra

Sthanunathan Ramakrishnan

Sriram Murali

Jawaharlal Tangudu

Sarma Sundareswara Gunturi

Anand Ganesh Dabak

Sundarrajan Rangachari

Sashidharan Venkatraman

Pooja Sundar

Suvam Nandi

Yeswanth Guntupalli

Pankaj Gupta

Aravind Ganesan

Bijoy Bhukania

Visvesvaraya Appala Pentakota

Ranjit Gharpurey

Sreenath Narayanan Potty

Srinath Hosur

Deric Wayne Waters

Jagannathan Venkataraman

Jayawardan Janardhanan

Srinivas Lingam

Hirohisa Yamaguchi

Nagarajan Viswanathan

Nagalinga Swamy Basayya Aremallapur

Aswath Vs

Sachin Bhardwaj

Ajai Paulose

Ram Narayan Krishna Nama Mony

Richard K Martin

Wenjing Lu

C Richard Johnson, Jr

Kalyan Gudipati

Aris Papasakellariou

Eko Nugroho Onggosanusi

Timothy M Schmidl

Tarkesh Pande

Sandeep Rao

Manish Goel

June Chul Roh

Sandeep Kesrimal Oswal

Raghu Ganesan

Yan Hui

Indu Prathapan

Neeraj Shrivastava

Goutam Dutta

Heng-Chih Lin

Srinivas Kumar Reddy Naru

Manoneet Singh

Bharath Patil

Francesco Dantoni

Chandrasekhar Sriram

Subhash Chandra Venkata Sadhu

Paul H Fontaine

Saket Thukral

William A Sethares

Sanjay Pennam

Harshavardhan Adepu

Venkateshwara Reddy Pothapu

Wonzoo Chung

Girish Nadiger

Vamsi Krishna Kandalla

Brahmendra Reddy Yatham

Shailesh Wardhen

Mathews John

Jin-Meng Ho

Ariton E Xhafa

Harish Viswanathan

Abdellatif Bellaouar

Karthik Ramasubramanian

Shagun Dusad

Michael Oliver Polley

Rahul Anand Sharma

Charles Kasimer Sestok, Iv

Venugopal Gopinathan

Yogesh Darwhekar

Muhammad Zubair Ikram

Rakesh Kumar

Viswanathan Nagarajan

Markus Rupp

Harikrishna Parthasarathy

Karthikeyan Gunasekaran

Charles Sestok

Abhijit Das

Murugesh Prashanth Subramaniam

Paul Aymeric Fontaine

Raju Kharataram Chaudhari

Michel Frechette

Robert Clair Keller

Prashant Kota

Karthik Khanna Subramani

Divyeshkumar Mahendrabhai Patel

Jagdish Kumar Agrawal

Sandeep Kasargod

Sreenath Potty Narayanan

Bragadeesh Suresh Babu

Harsh Garg

Bragadeesh S

Avinash Vasudev Sakleshpur

Crest factor reduction circuitry includes: a peak neighborhood analyzer; peak detection circuitry and a controller. The peak neighborhood analyzer is configured to: receive an input signal; analyze the input signal to determine whether a peak larger than a target threshold is expected within an interval; and provide a first control signal responsive to determining that a peak larger than the target threshold is expected within the interval. The controller is configured to: receive the first control signal; and gate a clock or data to the peak detection circuitry responsive to the first control signal.

Power efficient crest factor reduction

An apparatus to detect a heart rate of a user includes a motion detection circuit configured to generate a motion status signal indicative of a motion status of the user. The apparatus also comprises a filter circuit coupled to the motion detection circuit that is configured to generate a filter circuit output signal based on dynamically variable. The coefficients are dependent on the motion status signal and a first signal received by the filter circuit. The apparatus also comprises a combination circuit coupled to the filter circuit and configured to receive a second signal indicative of the ambient light, the motion of the user, and non-ambient light reflected from the user. The combination circuit is configured to determine a difference between the second signal and the filter circuit output signal to generate a combination circuit output signal.

Motion detection and cancellation using ambient light

A three dimensional time of flight (TOF) camera includes a transmitter and a receiver. The transmitter is configured to generate an electrical transmit signal at a plurality of frequencies over an integration time period and generate a transmit optical waveform corresponding with the electrical transmit signal. The receiver is configured to receive a reflected optical waveform that is the transmit optical waveform reflected off of an object, integrate the reflected optical waveform over the integration time period, and determine a distance to the target object based on a TOF of the optical waveform. The integration time period includes exposure time periods. A length of each of the exposure time periods corresponds to one of the frequencies. The TOF is determined based on a correlation of the electrical transmit signal and the return optical waveform utilizing a correlation function with respect to the integration time period.

Phase anti-aliasing using spread-spectrum techniques in an optical distance measurement system

A technique for reinitializing a coupled circuit, the technique including receiving a common configuration value associated with states of a coupled circuit, tracking states associated with the coupled circuit while the coupled circuit is in a low power state based on the common configuration value, receiving the tracked state associated with the coupled circuit, receiving a scaling value associated with the coupled circuit, determining a current state of the coupled circuit based on the tracked state and the scaling value, and transmitting an indication of the current state to the coupled circuit when the coupled circuit has exited the low power state.

Low power digital modes for duty-cycled integrated transceivers

A wireless receiver includes a down converter module operable to deliver a signal having a signal bandwidth that changes over time, a dynamically controllable filter module having a filter bandwidth and fed by said down converter module, and a measurement module operable to at least approximately measure the signal bandwidth, said dynamically controllable filter module responsive to said measurement module to dynamically adjust the filter bandwidth to more nearly match the signal bandwidth as it changes over time, whereby output from said filter module is noise-reduced. Other wireless receivers, electronic circuits, and processes for their operation are disclosed.

Methods, circuits, systems and apparatus providing audio sensitivity enhancement in a wireless receiver, power management and other performances

An example apparatus includes: nonlinearity function selection circuitry with an output, the nonlinearity function selection circuitry to select a type of a nonlinearity function, the nonlinearity function to model nonlinearity portions of data output from an analog-to-digital converter, nonlinearity function term generation circuitry with a first input coupled to the output, the nonlinearity function term generation circuitry to generate one or more nonlinearity function terms of the nonlinearity function based on the type of the nonlinearity function and the data, and coefficient determination circuitry with a second input coupled to the output, the coefficient determination circuitry to determine one or more nonlinearity function coefficients based on the one or more nonlinearity function terms, the nonlinearity portions of the data to be compensated based on the one or more nonlinearity function coefficients.

High order nonlinearity estimation of radiofrequency analog-to-digital converters

A radio-frequency (RF) sampling transmitter (e.g., of the type that may be used in 5G wireless base stations) includes a complex baseband digital-to-analog converter (DAC) response compensator that operates on a complex baseband signal at a sampling rate lower than the sampling rate of an RF sampling DAC in the RF sampling transmitter. The DAC response compensator flattens the sample-and-hold response of the RF sampling DAC only in the passband of interest, addressing the problem of a sin c response introduced by the sample-and-hold operation of the RF sampling DAC and avoiding the architectural complexity and high power consumption of an inverse sin c filter that operates on the signal at a point in the signal chain after it has already been up-converted to an RF passband.

Low-complexity inverse sinc for RF sampling transmitters

A digital up-converter (DUC) includes conjugate-mixer-combiner. The conjugate-mixer-combiner includes a pre-combiner configured to generate combinations of a first in-phase (I) value to be transmitted at a first frequency of a first frequency band, a first quadrature (Q) value to be transmitted at the first frequency of a first frequency band, a second I value for to be transmitted at a second frequency of a second frequency band, and a second Q value to be transmitted at the second frequency of a second frequency band. The conjugate-mixer-combiner further includes a plurality of multipliers collectively configured to shift the combinations based on an average difference between the first frequency and the second frequency.

Digital upconverter for radio frequency sampling transmitter

A digital down converter (DDC) that improves efficiency by taking advantage of the periodicity of the coarse mixing process and the memory inherent in the convolution operation performed by decimation filters. In embodiments, the DDC filters and decimates a received signal to generate subfilter outputs and coarse mixes the subfilter outputs for each frequency band of interest. Accordingly, the DDC eliminates the need for separate decimation filters for each of the in-phase (I-phase) and quadrature (Q-phase) signals of each frequency band. In some embodiments, for each frequency band, the DDC combines the subfilter outputs into partial sums for each of the I- and Q-phases. In some of those embodiments, the coarse mixing operation is performed by multiplying the partial sums by real multiplicands and performing a simple post-rotation operation. In those embodiments, the DDC significantly reduces the number of multiplication operations required to perform the coarse mixing process.

Filtered coarse mixer based digital down-converter for RF sampling ADCs

A wireless receiver () includes a down converter module () operable to deliver a signal having a signal bandwidth that changes over time, a dynamically controllable filter module () having a filter bandwidth and fed by said down converter module (), and a measurement module () operable to at least approximately measure the signal bandwidth, said dynamically controllable filter module () responsive to said measurement module () to dynamically adjust the filter bandwidth to more nearly match the signal bandwidth as it changes over time, whereby output from said filter module () is noise-reduced. Other wireless receivers, electronic circuits, and processes for their operation are disclosed.

A transmitter includes a data stream encoder layer having an output and a pattern generator having a bit pattern output. The transmitter further includes a first multiplexer having first and second inputs and a first multiplexer output. The first input is coupled to the output of the data stream encoder layer, and the second input is coupled to the bit pattern output of the pattern generator. While at least a portion of the data stream encoder layer is powered down, the pattern generator is configured to provide bit patterns on its bit pattern output, a control signal to the first multiplexer is configured to select the second input of the first multiplexer, and the first multiplexer is configured to output the bit patterns on the output of the first multiplexer.

Reduced power transmitter during standby mode

Dual mode filters having two reconfigurable multi-stage filters. In a dual band mode, each reconfigurable filter filters an input signal in a different band using every filter stage. In a single band mode, both reconfigurable filters are effectively divided into two sub-chains that include either the odd-numbered filter stages or the even-numbered filter stages. Together, the four sub-chains in the single band mode filter an input signal in a single band with a higher parallelization than each reconfigurable filter in the dual band mode. In some embodiments, the dual mode filter is a decimation filter. In other embodiments, the dual mode filter is a resampling filter. In still other embodiments, the dual mode filter is an interpolation filter.

Dual mode digital filters for RF sampling transceivers

A radio frequency transmitter includes an upconverter that outputs in-phase (I) and quadrature (Q) signals, a digital timing offset circuit, first and second digital-to-analog converters (DACs), an analog timing offset removal circuit, first and second pulse shapers, and an adder. The digital timing offset circuit introduces a time offset between the I and Q signals. The first and second DACs output analog I and Q signals, respectively, and have first and second clock signals, respectively. The first and second clock signals have the same frequency and are offset relative to each other by the time offset. The analog timing offset removal circuit removes the time offset between the analog I and Q signals. The first and second pulse shapers receive the analog I and Q signals, respectively, and output pulse-shaped I and Q signals. The adder receives the pulse-shaped I and Q signals and outputs an intermediate frequency signal.

Low intermediate frequency transmitter

A zero-insertion FIR filter architecture for filtering a signal with a target band and a secondary band. Digital filter circuitry includes an L-tap FIR (finite impulse response) filter, with a number L filter tap elements (L=0, 1, 2, . . . (L&#x2212;1)), each with an assigned coefficient from a defined coefficient sequence. The L-tap FIR filter is configurable with a defined zero-insertion coefficient sequence of a repeating sub-sequence of a nonzero coefficient followed by one or more zero-inserted coefficients, with a number Nj of nonzero coefficients, and a number Nk of zero-inserted coefficients, so that L=Nj+Nk. The L-tap FIR filter is configurable as an M-tap FIR filter with a nonzero coefficient sequence in which each of the L filter tap elements is assigned a non-zero coefficient, the M-tap FIR filter having an effective length of M=(Nj+Nk) non-zero coefficients.

Digital filtering for a signal with target and secondary signal bands

A circuit includes a noise generator and a delay element. The output of the noise generator couples to the input of the delay element. The output of the delay element is coupled to a first input of a logic circuit, and the output of the noise generator is coupled to a second input of the logic circuit. The output of the logic circuit is coupled to a first control input of a waveform storage circuit. The waveform storage circuit is configured to produce a first digital waveform on its output responsive to a first logic state on the output of the logic circuit and to produce a second digital waveform on its output responsive to a second logic state on the output of the logic circuit. A sequencer has a sequencer output coupled to the second control input of the waveform storage circuit.

Dither generation for radio frequency sampling digital-to-analog converters

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Bengaluru, India

Jaiganesh Balakrishnan