Apple Inc.

Mips Technologies, Inc.

Jaidev Prasad Patwardhan

Ramesh B Gunna

Tse-Yu Yeh

Brian P Lilly

Wei-Han Lien

Peter J Bannon

Andrew J Beaumont-Smith

Shih-Chieh Wen

Radhika Thekkath

Ryan C Kinter

Thomas Benjamin Berg

In an embodiment, a combining write buffer is configured to maintain one or more flush metrics to determine when to transmit write operations from buffer entries. The combining write buffer may be configured to dynamically modify the flush metrics in response to activity in the write buffer, modifying the conditions under which write operations are transmitted from the write buffer to the next lower level of memory. For example, in one implementation, the flush metrics may include categorizing write buffer entries as 'collapsed.' A collapsed write buffer entry, and the collapsed write operations therein, may include at least one write operation that has overwritten data that was written by a previous write operation in the buffer entry. In another implementation, the combining write buffer may maintain the threshold of buffer fullness as a flush metric and may adjust it over time based on the actual buffer fullness.

Combining write buffer with dynamically adjustable flush metrics

A computer readable storage medium includes executable instructions to characterize a coherency controller. The executable instructions define ports to receive processor trace information from a set of processors. The processor trace information from each processor includes a processor identity and a condensed coherence indicator. Circuitry produces a trace stream with trace metrics and condensed coherence indicators.

Apparatus and method for condensing trace information in a multi-processor system

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Sunnyvale, CA, United States of America

Jaidev Prasad Patwardhan