Synopsys, Inc.

Impinj, International Ltd.

University of Washington

Impinj, Inc.

Virage Logic Corporation

Neurovista Corporation

Synopsis Incorporated

Jaideep Mavoori

Ronald A Oliver

Yanjun Ma

Christopher J Diorio

Harley K Heinrich

Tan Mau Wu

Ronald Lee Koepp

Cong Quoc Khieu

Todd E Humes

Kent W Leyde

John F Harris

Chris Diorio

Technologies are generally directed to assembly of a Radio Frequency Identification (RFID) tag precursor. An assembly may be provided, the assembly having an RFID integrated circuit (IC), a nonconductive repassivation layer on a surface of the IC and confined within a perimeter of the surface, and a conductive redistribution layer on the repassivation layer and confined within the perimeter of the surface, in which a first portion of the redistribution layer is electrically connected to the IC through a first electrical connection. A substrate having a first antenna terminal to the assembly may be attached with an adhesive, and at least a first portion of a nonconductive barrier present on at least one of the first antenna terminal and the first portion of the redistribution layer may be reacted with a reactant to make the first portion of the nonconductive barrier conductive. A second electrical connection may then be formed between the first antenna terminal and the first portion of the redistribution layer through the first portion of the nonconductive barrier.

RFID integrated circuits with large contact pads

An RFID IC assembly having a repassivation layer and a conductive redistribution layer may be assembled onto a tag substrate with an additional layer. The additional layer includes one or more etchants for creating an opening in a nonconductive barrier layer between the assembly and the substrate, and may also include an adhesive for attaching the assembly to the substrate.

An assembly having an RFID integrated circuit (IC), a nonconductive repassivation layer on a surface of the IC and confined within a perimeter of the surface, and a conductive redistribution layer on the repassivation layer and confined within the perimeter of the surface may be provided. At least a first portion of the redistribution layer may be electrically connected to the IC through a first opening in the repassivation layer. Furthermore, a substrate having a first antenna terminal may be provided, and a second opening may be formed in a nonconductive barrier present on at least one of the first antenna terminal and the first portion of the redistribution layer with an etchant. The first opening and the second opening may be nonoverlapping. The assembly may be attached to the substrate with an adhesive.

Assembling a radio frequency identification (RFID) tag precursor

A Schottky junction diode device having improved performance and a multiple well structure is fabricated in a conventional CMOS process. A substrate including a material doped to a first conductivity type is formed. A first well is disposed over the substrate. The first well includes a material doped differently, such as to a second conductivity type opposite that of the first conductivity type. A second well is disposed within the first well. A region of metal-containing material is disposed in the second well to form a Schottky junction at an interface between the region of metal-containing material and the second well. In one embodiment, a second well contact is disposed in a portion of the second well.

Schottky junction diode devices in CMOS with multiple wells

Apparatus, systems, and methods may include managing electrostatic discharge events by using a semiconductor device having a non-aligned gate to implement a snap-back voltage protection mechanism. Such devices may be formed by doping a semiconductor substrate to form a first conductive region as a well, forming one of a source region and a drain region in the well, depositing a layer of polysilicon on the substrate to establish a gating area that does not overlap the one of the source region and the drain region, and forming an integrated circuit supported by the substrate to couple to the one of the source region and the drain region to provide snap-back voltage operation at a node between the integrated circuit and the source or drain region. Additional apparatus, systems, and methods are disclosed.

Electrostatic discharge management apparatus, systems, and methods

Apparatus, systems, and methods may include managing electrostatic discharge events in radio frequency identification (RFID) devices by using a semiconductor circuit having a non-aligned gate to implement a snap-back voltage protection mechanism. Such circuits may be formed by doping a semiconductor substrate to form a first conductive region as a well, forming one of a source region and a drain region in the well, depositing a layer of polysilicon on the substrate to establish a gating area that does not overlap the one of the source region and the drain region, and forming an integrated circuit including an RFID circuit that is supported by the substrate to couple to the one of the source region and the drain region to provide snap-back voltage operation at a node between the integrated circuit and the source or drain region. Additional apparatus, systems, and methods are disclosed.

Radio frequency identification device electrostatic discharge management

A Schottky junction diode device having improved performance is fabricated in a conventional CMOS process. A substrate including a material doped to a first conductivity type is formed. A first well is disposed over the substrate. The first well includes a material doped to a second conductivity type opposite that of the first conductivity type. A region of metal-containing material is disposed over the first well to form a Schottky junction at an interface between the region of metal-containing material and the first well. In one embodiment, a first well contact is disposed in a portion of the first well. A second well is disposed over the substrate wherein the second well includes a material doped to the first conductivity type. In one embodiment, the first well and the second well are not in direct contact with one another.

Schottky junction diode devices in CMOS

The present invention provides systems and methods for ambulatory, long term monitoring of a physiological signal from a patient. At least a portion of the systems of the present invention may be implanted within the patient in a minimally invasive manner. In preferred embodiments, brain activity signals are sampled from the patient and are transmitted to a handheld patient communication device for further processing.

Minimally invasive system for selecting patient-specific therapy parameters

A circuit for classification of analog input signals, comprising an analog memory component, such as a floating gate, used to store a threshold value; a threshold detection module used to determine whether the analog input signal exceeds the threshold value; a time delay module used to delay a processing of the analog signal; a time-amplitude window calculation module used to determine whether an amplitude of the analog input signal is between a lower limit and an upper limit of an amplitude window; and an output module indicating whether the amplitude of the analog signal is between the lower and the upper limit, wherein the indication is used to determine whether the analog input signal belongs to one of a plurality of analog signal classes. The classification is implemented in the analog domain, eliminating the need for sampling and digitizing the analog signal, consequently minimizing circuit area and power.

Growing community of inventors

Bellevue, WA, United States of America

Jaideep Mavoori