Agency for Science, Technology and Research

National University of Singapore

Jagar Singh

Ming Li

Dim-Lee Kwong

Shiyang Zhu

Chunxiang Zhu

Yong Tian Hou

Jingde Chen

Sungjoo Lee

A method of fabricating an N-type Schottky barrier Source/Drain Transistor (N-SSDT) with ytterbium silicide (YbSi) for source and drain is presented. The fabrication of YbSiis compatible with the normal CMOS process but ultra-high vacuum, which is required for ErSifabrication, is not needed here. To prevent oxidation of ytterbium during ex situ annealing and to improve the film quality, a suitable capping layer stack has been developed.

Schottky barrier source/drain n-mosfet using ytterbium silicide

A double barrier resonant tunneling diode (RTD) is formed and integrated with a level of CMOS/BJT/SiGe devices and circuits through processes such as metal-to-metal thermocompressional bonding, anodic bonding, eutectic bonding, plasma bonding, silicon-to-silicon bonding, silicon dioxide bonding, silicon nitride bonding and polymer bonding or plasma bonding. The electrical connections are made using conducting interconnects aligned during the bonding process. The resulting circuitry has a three-dimensional architecture. The tunneling barrier layers of the RTD are formed of high-K dielectric materials such as SiO, SiN, AlO, YO, TaO, TiO, HfO, PrO, ZrO, or their alloys and laminates, having higher band-gaps than the material forming the quantum well, which includes Si, Ge or SiGe. The inherently fast operational speed of the RTD, combined with the 3-D integrated architecture that reduces interconnect delays, will produce ultra-fast circuits with low noise characteristics.

Method of making resonant tunneling diodes and CMOS backend-process-compatible three dimensional (3-D) integration

Growing community of inventors

Singapore, Singapore

Jagar Singh