Lg Display Co., Ltd.

Jaeyi Choi

SooHong Choi

HongJae Shin

ChongHun Park

Seongho Yun

Hooin Park

Shinji Takasugi

JaeYoung Oh

Minkyu Chang

WooSup Shin

Wooseok Choi

The present disclosure relates to a gate driving circuit and a display device including the gate driving circuit, and more particularly, to a gate driving circuit having a reduced size and a display device including the gate driving circuit. The gate driving circuit comprises a plurality of dummy stage circuits and stage circuits, which supply gate signals to each gate line and comprise a Q node, a QH node, and a QB node. A gate signal output circuit included in each of the stage circuits can output first to j-th gate signals based on first to j-th scan clock signals or a first low voltage according to the voltage level of the Q node or the voltage level of the QB node.

Gate driving circuit and display device including gate driving circuit

The present disclosure relates to a display panel and a display device, and can provide a display panel and a display device that have a clock signal line arrangement structure that is advantageous to electrostatic discharge.

Display panel and display device

A display panel according to embodiments of the disclosure may comprise a substrate in which a display area and a non-display area are divided, a gate driving circuit disposed on the substrate and disposed in a gate driving circuit area within the non-display area, a plurality of gate clock lines disposed on the substrate and disposed in a first line area positioned outside the gate driving circuit area in the non-display area, an overcoat layer disposed on the plurality of gate clock lines and the gate driving circuit, a cathode electrode disposed in the display area and extending to the non-display area, and a load deviation compensation pattern overlapping the plurality of gate clock lines.

Display panel

A gate driver circuit and a display device including the gate driver circuit are disclosed. The gate driver circuit includes a stage for outputting at least two gate signals. The stage comprises, a first output buffer for outputting a first gate signal in response to a voltage of a Q node and the voltage of a Qb node; a second output buffer for outputting a second gate signal in response to the voltage of the Q node and the voltage of the Qb node; and a first diode circuit disposed between the Q node and the second output buffer.

Display device with gate driver capable of providing high resolution and reducing deterioration of image quality

Disclosed are a gate driver circuit having a reduced size, and a display device including the same. The gate driver circuit includes a plurality of stage blocks for outputting n gate signals (n is a positive integer). Each stage block includes each start stage circuit including a blank start circuit for receiving a block selection signal, and a signal output circuit for outputting a carry signal and a gate signal; and a plurality of normal stage circuits connected to each start stage circuit.

Gate driver circuit and display device including the same

A gate driving circuit and a light emitting display apparatus including the same are disclosed, in which current leakage of a control node may be avoided. The gate driving circuit includes first to mth stage circuits, wherein each of the first to mth stage circuits includes first to fifth control nodes, a node control circuit controlling a voltage of each of the first to fourth control nodes based on a first front carry signal, a sensing control circuit controlling a voltage of the fifth control node based on a line sensing preparation signal, a second front carry signal and a first reset signal, and a first node reset circuit controlling the voltage of the first control node based on the voltage of the fifth control node and a second reset signal, wherein the first node reset circuit may include a discharge path having two thin film transistors connected between a gate low potential voltage line and the fifth control node.

Gate driving circuit and light emitting display apparatus comprising the same

The present disclosure relates to a gate driver and an organic light-emitting display device including same. A gate driver according to an embodiment of the present disclosure includes a plurality of stages. Each of the stages includes: a first pull-up transistor configured to output a carry clock to a first output terminal as a carry signal while a Q node is bootstrapped to a voltage higher than a gate on voltage; a second pull-up transistor configured to output a scan clock to a second output terminal as a scan signal while the Q node is bootstrapped; and holding transistors configured to operate based on a voltage of a QB node, which QB node is charged and discharged in a manner reverse to that of the Q node. The holding transistors are connected to the second output terminal and the Q node, and the holding transistors are electrically isolated from the first output terminal.

Gate driver and organic light-emitting display device including same

An organic light emitting diode display panel includes data lines arranged in a first direction; gate lines arranged in a second direction to cross the data lines; a driving voltage line arranged in the first direction; a reference voltage line arranged in the first direction; data pads respectively at ends of corresponding ones of the data lines; a driving voltage pad at an end of the driving voltage line; and a reference voltage pad at an end of the reference voltage line. A first distance is defined between the driving voltage pad and an adjacent data pad, a second distance is defined between adjacent ones of the data pads, and a third distance is defined between the reference voltage pad and an adjacent data pad. At least two of the first distance, the second distance, and the third distance are different from each other.

Organic light emitting diode display panel having pads disposed at different distances from an edge and organic light emitting diode display device having the same

A gate shift register and an organic light emitting diode display including the same are disclosed. The gate shift register includes a first stage and a second stage that output image display gate pulses during an image data writing period and selectively output a sensing gate pulse in a vertical blanking interval in which image display data is not written. The first stage includes a node Q, a node Qbo, a node M, a first sensing control block activating the node Q, and a second sensing control block deactivating the node Qbo. The second stage includes a node Q, a node Qbe, a third sensing control block activating the node Q, and a fourth sensing control block deactivating the node Qbe. The first stage and the second stage share a partial circuit necessary for driving with each other.

Gate shift register and organic light emitting diode display including the same

Organic light emitting diode display panel with pads and organic light emitting diode display device having the same

Discussed is an organic light-emitting display panel including: an active area corresponding to an image display region; and a non-active area corresponding to a region outside of the active area, wherein the active area includes a plurality of signal lines arranged in an array, wherein the non-active area includes a pad region to which a source driver IC is mounted, and a switching structure, wherein the pad region includes a plurality of pads arranged in correspondence with the array of the signal lines, and wherein the switching structure includes: a common reference voltage pad-connection terminal connected to a common reference voltage pad of the display panel; a plurality of reference voltage line-connection terminals connected to a plurality of reference voltage lines of the display panel; and a switching circuit to switch connections between the common reference voltage pad-connection terminal and the plurality of reference voltage line-connection terminals.

Growing community of inventors

Paju-si, South Korea

Jaeyi Choi