Samsung Electronics Co., Ltd.

Jaeuk Shin

Sangjine Park

Youngtak Kim

Wonjun Lee

Hyeyeong Seo

Hyunjung Lee

Jihun Cheon

Suji Kim

Bowo Choi

A semiconductor device includes a landing pad, a first insulating pattern in contact with a lower portion of a side surface of the landing pad, a pad oxide layer having a lateral portion disposed on a portion of an upper surface of the landing pad and a vertical portion in contact with an upper portion of the side surface of the landing pad, a second insulating pattern in contact with an upper surface of the first insulating pattern and covering the first insulating pattern and the pad oxide layer, and a lower electrode that vertically passes through the second insulating pattern and is in contact with a portion of the upper surface and an upper portion of a side surface of the landing pad.

Semiconductor devices having landing pads

A semiconductor device is provided including a plurality of first conductive patterns disposed on a substrate. A first insulating pattern is disposed between the plurality of first conductive patterns. A plurality of second conductive patterns is disposed on the plurality of first conductive patterns. A first memory cell structure is disposed between the plurality of first conductive patterns and the plurality of second conductive patterns. A second insulating pattern is disposed on the first insulating pattern and on a side surface of the first memory cell structure. A first vertical structure is disposed on the first insulating pattern and passing through the second insulating pattern to an upper surface of the substrate. The first insulating pattern has a plurality of recess portions. The plurality of recess portions include a first recess portion and a second recess portion. The first recess portion and the second recess portion have different depths.

Semiconductor device including vertical structures and a method of manufacturing the same

A semiconductor device, includes: a first conductive structure on a substrate; a second conductive structure on the first conductive structure; and a first memory cell structure between the first conductive structure and the second conductive structure, wherein the first memory cell structure includes: a switching material pattern on the first conductive structure; a data storage material pattern on the switching material pattern; and an upper conductive pattern on the data storage material pattern, wherein a first width of a lower region of the data storage material pattern is less than a first width of the switching material pattern, and wherein a first width of the upper conductive pattern is less than a width of an upper region of the data storage material pattern.

Semiconductor device including a data storage material pattern

Growing community of inventors

Suwon-si, South Korea

Jaeuk Shin