Samsung Electronics Co., Ltd.

Jaehyung Park

Hoonjoo Na

Seokho Kim

Kyuha Lee

Joohee Jang

Seongmin Son

Kwangjin Moon

Yikoan Hong

Ju-Il Choi

Pil-Kyu Kang

Hoechul Kim

Hochul Hwang

Chihyun Cho

Moonsoo Kim

Hoondo Heo

Pil-Joo Yoon

Jeongwon Lee

Yunjang Jin

Jiwoong Oh

Seunggeol Baek

Haechang Lee

Pilkyu Kang

Sujin Yun

Sungwon Hong

A method includes forming a first substrate including a first dielectric layer and a first metal pad, forming a second substrate including a second dielectric layer and a second metal pad, and bonding the first dielectric layer to the second dielectric layer, and the first metal pad to the second metal pad. One or both of the first and second substrates is formed by forming a first insulating layer, forming an opening in the layer, forming a barrier on an inner surface of the opening, forming a metal pad material on the barrier, polishing the metal pad material to expose a portion of the barrier and to form a gap, expanding the gap, forming a second insulating layer to fill the opening and the gap, and polishing the insulating layers such that a top surface of the metal pad is substantially planar with an upper surface of the polished layer.

Semiconductor device and method of manufacturing the same

A semiconductor device and a semiconductor package, the device including a first buffer dielectric layer on a first dielectric layer; a second dielectric layer and a second buffer dielectric layer sequentially disposed on the first buffer dielectric layer, the second buffer dielectric layer being in contact with the first buffer dielectric layer; and a pad interconnection structure that penetrates the first buffer dielectric layer and the second buffer dielectric layer, wherein the pad interconnection structure includes copper and tin.

Method of fabricating a semiconductor device

A semiconductor package includes a first semiconductor chip, a second semiconductor chip, first main connection pad structures, and first dummy connection pad structures. The first main connection pad structures are arranged at an interface between the first semiconductor chip and the second semiconductor chip and arranged to be apart from each other by a first main pitch in a first direction parallel to a top surface of the first semiconductor chip, wherein each of the first main connection pad structures includes a first connection pad electrically connected to the first semiconductor chip, and a second connection pad electrically connected to the second semiconductor chip and contacting the first connection pad. The first dummy connection pad structures are arranged at an interface between the first semiconductor chip and the second semiconductor chip, are arranged to be apart from the first main connection pad structures, and are arranged to be apart from each other by a first dummy pitch in the first direction, the first dummy pitch being greater than the first main pitch.

Semiconductor packages

A semiconductor device includes a first adsorption layer, a first bonding layer, a second bonding layer, and a second adsorption layer stacked on a first substrate, and a conductive pattern structure penetrating through the first adsorption layer, the first bonding layer, the second bonding layer and the second adsorption layer. The first and second bonding layers are in contact with each other, and each of the first and second adsorption layers includes a low-&#x3ba; dielectric material.

Method of manufacturing a semiconductor device including bonding layer and adsorption layer

A semiconductor package includes main pad structures and dummy pad structures between a first semiconductor chip and a second semiconductor chip. The main pad structures include first main pad structures apart from one another on the first semiconductor chip and second main pad structures placed apart from one another on the second semiconductor chip and bonded to the first main pad structures. The dummy pad structures include first dummy pad structures including first dummy pads apart from one another on the first semiconductor chip and first dummy capping layers on the first dummy pads, and second dummy pad structures including second dummy pads apart from one another on the second semiconductor chip and second dummy capping layers on the second dummy pads. The first dummy capping layers of the first dummy pad structures are not bonded to the second dummy capping layers of the second dummy pad structures.

Semiconductor package for improving bonding reliability

An electronic device include a first substrate; a plurality of thin film transistors (TFTs) disposed on the first substrate and a plurality of pixel electrodes connected to the plurality of TFTs, respectively; a second substrate disposed above the first substrate; a plurality of touch electrodes disposed between the first substrate and the second substrate to detect a touch position; a ground layer disposed under the first substrate; and at least one integrated circuit (IC) configured to apply a touch-driving signal to each of the plurality of touch electrodes during a touch-sensitive period, and apply a driven shield signal having an amplitude that is equal to an amplitude of the touch-driving signal to the ground layer during the touch-sensitive period.

Display including touch-sensitive circuit and method for operating the same

A method of manufacturing a semiconductor device according to example embodiments includes: sequentially forming first through third insulating layers on a substrate; forming an opening by etching the first through third insulating layers; forming a conductive layer configured in the opening; forming a fourth insulating layer in the opening after the forming of the conductive layer; and removing a portion of an edge region of the substrate after the forming of the fourth insulating layer.

Methods of manufacturing semiconductor devices

A semiconductor device includes a first adsorption layer, a first bonding layer, a second bonding layer, and a second adsorption layer stacked on a first substrate, and a conductive pattern structure penetrating through the first adsorption layer, the first bonding layer, the second bonding layer and the second adsorption layer. The first and second bonding layers are in contact with each other, and each of the first and second adsorption layers includes a low-K dielectric material.

Semiconductor devices including bonding layer and adsorption layer

A semiconductor device is provided and includes first and second semiconductor chips bonded together. The first chip includes a first substrate, a first insulating layer disposed on the first substrate and having a top surface, a first metal pad embedded in the first insulating layer and having a top surface substantially planar with the top surface of the first insulating layer, and a first barrier disposed between the first insulating layer and the first metal pad. The second chip includes a second substrate, a second insulating layer, a second metal pad, and a second barrier with a similar configuration to the first chip. The top surfaces of the first and second insulating layers are bonded to provide a bonding interface, the first and second metal pads are connected, and a portion of the first insulating layer is in contact with a side region of the first metal pad.

A semiconductor device and a semiconductor package, the device including a pad interconnection structure that penetrates a first buffer dielectric layer and a second buffer dielectric layer, wherein the pad interconnection structure includes copper and tin, the pad interconnection structure includes a central part, a first intermediate part surrounding the central part; a second intermediate part surrounding the first intermediate part, and an outer part surrounding the second intermediate part, a grain size of the outer part is less than a grain size of the second intermediate part, the grain size of the second intermediate part is less than a grain size of the first intermediate part, and the grain size of the first intermediate part is less than a grain size of the central part.

Semiconductor device including interconnection structure including copper and tin and semiconductor package including the same

The present invention is for registering and authenticating biometric data in an electronic device, the electronic device including: a display including a touch sensor; a fingerprint sensor for acquiring fingerprint data through at least a partial region of the display region of the display; and a processor. Here, the processor can be set to: acquire first touch information from a first user input using the touch sensor, in response to the first user input for registering a fingerprint of a user; acquire first fingerprint data using the fingerprint sensor; register the first fingerprint data as fingerprint information based on the first touch information, the registering operation including an operation for classifying the first fingerprint data based on the first touch information; acquire second touch information from a second user input using the touch sensor, in response to the second user input for authenticating the fingerprint of the user; acquire second fingerprint data using the fingerprint sensor; select a candidate group for comparison from among the fingerprint information based on the second touch information; and compare fingerprint data included in the candidate group with the second fingerprint data.

Method for registering and authenticating biometric data and electronic device thereof

An electronic device having one or more piezoelectric elements is provided. The electronic device includes a housing including at least one portion of a surface of the electronic device, a first piezoelectric element formed at a partial area of the housing and configured to output a signal of a designated frequency band, and a second piezoelectric element formed at another partial area of the housing and configured to receive a reflection signal in which the signal output from the first piezoelectric element is reflected by an external object that has contacted the at least one portion of the housing.

Growing community of inventors

Anyang-si, South Korea

Jaehyung Park