Samsung Electronics Co., Ltd.

Jaehyuk Yang

Hyunseok Nam

Sangho Kim

Yus Ko

Wontaeck Jung

YongSung Cho

Jinwoo Yang

Dobin Kim

Seunggyu Lee

Seongmun Park

A device includes a function circuit that operates based on power provided by a first positive supply voltage and a first negative supply voltage, a monitoring circuit that operates based on power provided by a second positive supply voltage and a second negative supply voltage and that generates a first monitor signal based on monitoring an operation of the function circuit, and an output circuit that generates a second monitor signal based on monitoring the first positive supply voltage, generates a third monitor signal based on monitoring the second positive supply voltage, and generates an output signal that is output through one or more output pins, based on the first monitor signal, the second monitor signal, and the third monitor signal.

Device and method for monitoring function circuit and outputting result of monitoring

A memory device and a method for programming the same may include, applying program loops to a plurality of memory cells of the memory device to adjust threshold voltages of the plurality of memory cells to desired target states, each of the program loops including a program section and a verification section, programming the memory cells of a first page, storing a number of first program loops used to complete the programming of the memory cells of the first page to a first target state, programming the memory cells of a second page to the first target state, the second page adjacent to the first page, and performing a verification operation on the second page.

Memory device and method for determining start point and end point of verification operation of target state during programming

A clock generating device includes a first voltage output circuit configured to output a first voltage corresponding to a power supply voltage in response to a preliminary clock signal, a clock output circuit configured to generate the preliminary clock signal and a final clock signal at a period corresponding to a difference between the first voltage and a negative feedback voltage, a negative feedback voltage generating circuit configured to generate the negative feedback voltage from a reference value corresponding to a frequency of the final clock signal and a second voltage and filtered to a uniform voltage level, and a second voltage output circuit configured to output the second voltage to the negative feedback voltage generating unit, the second voltage having lower sensitivity of fluctuations in the power supply voltage than the first voltage.

Clock generator and electronic device including the same

A switching regulator may be used to generate an output voltage from an input voltage. The switching regulator includes; an inductor including a first terminal and a second terminal that passes an inductor current from the first terminal to the second terminal, a first switch that applies the input voltage to the first terminal when turned ON, a second switch that applies a ground potential to the first terminal when turned ON, a feedback circuit configured to estimate a load receiving the output voltage, detect when the inductor current reaches an upper bound or a lower bound, and adjust the lower bound based on the estimated load, and a switch driver configured to control the first switch and the second switch, such that the inductor current is between the upper bound and the lower bound in response to at least one feedback signal provided by the feedback circuit.

Growing community of inventors

Gunpo-si, South Korea

Jaehyuk Yang