Lg Electronics Inc.

Samsung Electronics Co., Ltd.

Lg Display Co., Ltd.

Hyundai Motor Company

Kia Motors Corporation

Industry-university Cooperation Foundation Hanyang University

Jaehoon Choi

Yongwoo Kwon

Kangwoon Cheon

Seungji Yong

Jungjin Park

Jooyoung Choi

Youngsoo Ha

Kyungah Lee

Jonghee Han

Sungil Cho

Joonsung Kim

Jaeseok Seong

Eunseok Cho

Jungsang You

Taewook Kim

Hongchul Kim

Junhyung Park

Byungho Kim

Jinho Yang

Byoung-Gug Min

Seunglyul Lee

Junyoung Son

Shi-Kyung Kim

Jaekwang Kim

Jinhee Yun

Munik Na

Kyoungshik Kim

Sanghyo Park

Kagkyu Jung

Doohwan Lee

Sayoon Kang

Jisoo Baek

Seongjin Shin

Hwasub Oh

Minjeong Gu

Hojoo Lee

Sangseok Hong

Minbeom Ko

Yeonjeong O

A laundry treating apparatus includes a body provided with a laundry inlet; and a door configured to open or close the laundry inlet, wherein the door includes a door frame having a first opening portion facing the laundry inlet and a second opening portion corresponding to a display module mounted at an inside in a state that the door is closed; and a door cover coupled to the door frame to form an appearance of the door, the door cover includes a non-light-transmitting region, and a first light transmitting region corresponding to the first opening portion and a second light transmitting region corresponding to the second opening portion within the non-light-transmitting region, and a mounting guide for an alignment between the first opening portion and the first light transmitting region and an alignment between the second opening portion and the second light transmitting region is provided on at least one of the door frame and door cover during mutual coupling.

Laundry treating apparatus

A method of manufacturing a semiconductor package is provided and includes: forming a lower redistribution structure, the lower redistribution structure including lower redistribution patterns having lower connection pads; forming an upper redistribution structure on a boundary surface of the lower redistribution structure, the upper redistribution structure including upper redistribution patterns having upper connection pads electrically connected to the lower connection pads; forming openings exposing at least a portion of each of the lower connection pads; disposing an interposer substrate, including the lower redistribution structure and the upper redistribution structure, on a base substrate, the lower connection pads of the interposer substrate electrically connected to wiring patterns of the base substrate through lower connection bumps disposed on the openings; and disposing at least one of semiconductor chips, including connection pads, on the interposer substrate, the connection pads electrically connected to the upper connection pads through upper connection bumps.

Semiconductor package

A semiconductor package includes a base substrate including a wiring pattern, an interposer substrate including lower and upper redistribution patterns, a semiconductor structure, a heat dissipation structure, a plurality of external connection bumps disposed on a lower surface of the base substrate, a plurality of lower connection bumps disposed between the base substrate and the interposer substrate, and a plurality of upper connection bumps disposed between the interposer substrate and the semiconductor structure.

A semiconductor package includes a connection structure having first and second surfaces opposing each other and including a first redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and including connection pads connected to the first redistribution layer; an encapsulant disposed on the first surface of the connection structure and encapsulating the semiconductor chip; and a second redistribution layer disposed on the encapsulant; a wiring structure connecting the first and second redistribution layers to each other and extending in a stacking direction; and a heat dissipation element disposed on at least a portion of the second surface of the connection structure.

An antenna array has wideband high gain characteristics and includes: a dielectric; a loop provided on a first surface of the dielectric and that has a first slot and a second slot; a first feed pin provided at a position corresponding to the first slot on a second surface of the dielectric; a second feed pin provided at a position corresponding to the second slot on the second surface of the dielectric; and a divider provided between the first feed pin and the second feed pin, and electrically connected to the loop.

Antenna array and vehicle including the same

A laundry treating apparatus is provided that may include a cabinet having a laundry opening formed therein, a door mounted to the cabinet to open and close the laundry opening, and a control panel arranged at or on the cabinet. The control panel may include a control panel body that projects forward from a front plate. A front side of the control panel body may be sloped to face upward, thereby permitting enhanced utilization of an inside space of the cabinet, easy display of information on the control panel to a user, and easy operation of the control panel by a user.

A semiconductor package includes a semiconductor chip including a connection pad disposed on an active surface of the semiconductor chip, a passivation layer disposed on the connection pad and the active surface and having an opening exposing at least a portion of the connection pad, and a capping pad covering the connection pad exposed to the opening; an encapsulant covering at least a portion of the semiconductor chip; and a connection structure disposed on the active surface of the semiconductor chip and including a connection via connected to the capping pad and a redistribution layer connected to the connection via, wherein the capping pad includes: a central portion disposed in the opening, and a peripheral portion extending from the central portion onto the passivation layer, and having a crystal grain having a size different from that of the crystal grain of the central portion.

Semiconductor package including capping pad having crystal grain of different size

A semiconductor package includes a connection structure having first and second surfaces opposing each other and including a redistribution layer. A semiconductor chip is disposed on the first surface of the connection structure and has connection pads connected to the redistribution layer. An encapsulant is disposed on the first surface of the connection structure and covers the semiconductor chip. A support pattern is disposed on a portion of an upper surface of the encapsulant. A heat dissipation bonding material has a portion embedded in the encapsulant in a region overlapping the semiconductor chip and extends to the upper surface of the encapsulant so as to cover the support pattern. A heat dissipation element is bonded to the upper surface of the encapsulant by the heat dissipation bonding material.

A laundry treating apparatus includes a body having a laundry introduction opening of a circular shape; a door configured to open or close the laundry introduction opening and having a display and a circular shape eccentric from the laundry introduction opening; a controller electrically connected to the display and provided at the body; and a hinge mounted to the body, configured to rotatably connect the door to the body, and formed to accommodate therein at least part of an electric wire to electrically connect the controller to the display.

A laundry treating apparatus includes a body having a laundry introduction opening of a circular shape; a door configured to open and close the laundry introduction opening and having a display and a circular shape eccentric from the laundry introduction opening, and a hinge mounted to the body and configured to rotatably connect the door to the body, wherein the door is rotatably connected to the hinge at connection points asymmetric to each other based on a horizontal center line of the door.

Door hinge of a laundry treating apparatus

Semiconductor packages and a methods for manufacturing a semiconductor package are provided. The method includes providing a package including a substrate, a semiconductor chip provided on the substrate, and a molding layer provided on the substrate and covering the semiconductor chip, the substrate including a ground pattern exposed at one surface of the substrate; and applying a solution including metal particles and a conductive carbon material onto the molding layer to form a shielding layer covering the molding layer. The shielding layer includes the metal particles and the conductive carbon material connected to at least one of the metal particles. The shielding layer extends onto the one surface of the substrate and is electrically connected to the ground pattern.

Semiconductor package and method for manufacturing the same

Growing community of inventors

Seoul, South Korea

Jaehoon Choi