Samsung Electronics Co., Ltd.

Jaehong Lee

Kang-ill Seo

Sooyoung Park

Byounghak Hong

Kang-Ill Seo

Seungchan Yun

Gunho Jo

Wonhyuk Hong

Hyoeun Park

Myunghoon Jung

Myung Yang

WookHyun Kwon

Provided is a semiconductor device which includes: a 1source/drain region; a 2source/drain region with a 2contact plug thereon; a 3source/drain region; a 2metal line on the 2contact plug with a 2via therebetween; a 1additional metal line on the 2contact plug with a 1additional via therebetween, wherein the 2source/drain region is disposed between and connected to the 1source/drain region and the 3source/drain region, and wherein the 2metal line and the 1additional metal line are spaced apart from each other on the 2contact plug by a 1predetermined distance in a 2horizontal direction.

Macro device-under-test structure for measuring contact resistance of semiconductor device

Integrated circuit devices including a bipolar junction transistor (BJT) and/or a P-N junction diode are provided. The integrated circuit devices may include a first stack including first and second semiconductor regions that are spaced apart from each other in a horizontal direction and have a first conductivity type and a plurality of nano-semiconductor layers that are stacked in a vertical direction and are between the first and second semiconductor regions. The plurality of nano-semiconductor layers each have a second conductivity type, and the first semiconductor region may include a side surface facing the plurality of nano-semiconductor layers. The integrated circuit device may also include a vertical semiconductor layer having the second conductivity type and a conductive contact that contacts the plurality of nano-semiconductor layers. The vertical semiconductor layer may contact the side surface of the first semiconductor region and the plurality of nano-semiconductor layers.

Bipolar junction transistors and P-N junction diodes including stacked nano-semiconductor layers

Provided is a semiconductor device which may include: a channel structure; a gate structure on the channel structure; and a gate contact structure on the gate structure, the gate contact structure configured to receive a gate input signal, wherein the gate contact structure is a portion of the gate structure itself, and no connection surface, interface or boundary is formed between the gate contact structure and the gate structure.

Semiconductor device including gate contact structure formed from gate structure

Integrated circuit devices and methods of forming the same. As an example, an integrated circuit device may include a substrate; a first transistor structure on the substrate; a second transistor structure stacked in a vertical direction on the first transistor structure; an isolation layer between the first transistor structure and the second transistor structure in the vertical direction; and a diode structure on the substrate and adjacent to the first transistor structure in a horizontal direction. The diode structure may be part of a discharging path between a gate electrode of the second transistor structure and the substrate. The discharging path may extend through the isolation layer.

Integrated circuit devices including discharging path and methods of forming the same

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Latham, NY, United States of America

Jaehong Lee