Samsung Electronics Co., Ltd.

Jae-yoon Sim

Jei-Hwan Yoo

Hyun-Soon Jang

Seung-hoon Lee

Kyung-Ho Kim

Kyung-ho Kim

Dong-Il Seo

Woo-Seop Jeong

Ki-Chul Chun

Sang-Jae Rhee

Sang-Pyo Hong

Woo-seop Jeong

Provided is a circuit for use in a semiconductor memory optimized to improve data read ability at low supply voltages. Circuit includes a direct sense AMP circuit, an input/output gate circuit, and an operation control unit. The direct sense AMP circuit transmits read data loaded in a bit line pair including first and second bit lines to a data input/output pair including first and second data input/output lines in response to a read command signal. The input/output gate circuit which, in response to a read/write signal, also passes the read data loaded in the bit line pair directly to the data input/output line pair, and passes write data loaded in the data input/output line pair directly to the bit line pair. The operation control unit which, in response to a column address signal and a write command, generates the read command signal and the read/write signal to turn ON both the direct sense AMP circuit and the input/output gate circuit in a data read operation, or to turn ON the input/output gate circuit and turn OFF the direct sense AMP circuit in a data write operation.

Sense amplifying circuit for a semiconductor memory with improved data read ability at a low supply voltage

A comparator circuit of a temperature sensor includes an output node and a variable current node. The output node is a first voltage at a given temperature when a current at the variable current node is less than a threshold current, and a different second voltage at the given temperature when the current at the variable current node is more than the threshold current. A variable resistance circuit includes at least n resistors of different resistive values connected in series between the variable current node of the comparator and a supply voltage, where n is an integer of 4 or more. A switching circuit is provided to selectively bypasses individual ones of the n resistors during a test sequence to determine a trip temperature of the sensor.

Temperature sensor and method for detecting trip temperature of a temperature sensor

A plurality of internal circuits of a memory device are operable at first and second internal voltages, where the first internal voltage is less than the second internal voltage. A first power port of the memory device receives a first power supply voltage, and a second power port of the memory device receives a second power supply voltage, where the first power supply voltage is less than the second power supply voltage. An internal voltage generation circuit of the memory device is selectively operable in either a first mode in which the second internal voltage is generated from the first power supply voltage, or a second mode in which the second internal voltage is generated from the second power supply voltage.

Memory device having dual power ports and memory system including the same

In this circuit, an external voltage source is supplied or down converted in response to a normal operating mode to provide the internal voltage source of a first level to the internal circuit. The external voltage source is converted to a voltage of a second level, lower than the first level, in response to a low consumption power mode having a complementary relation with the normal mode.

Internal voltage source generator in semiconductor memory device

A semiconductor integrated circuit includes a sense amplifier for amplifying an input signal and a complement of the input signal. The sense amplifier includes cross-coupled transistors. Each unique cross-coupled transistor is coupled to a corresponding unique transistor formed as a diode. A resistor is coupled in series between one cross-coupled resistor and an input port receiving the input signal, and another resistor is coupled in series between the other cross-coupled transistor and another input port receiving the complement of the input signal. Resistances associated with the sources of each cross-coupled transistor provide the resistance of the resistors.

Sense amplifier of semiconductor integrated circuit

A semiconductor memory device for performing an effective data sensing operation with a simple constitution. The device comprises first and second blocks each disposed about a sense amplifier and formed of a plurality of bitlines; a circuit for connecting a bitline coupled to memory cell of the first block and a complementary bitline of the second block to the sense amplifier, and charging a bitline coupled to memory cell of the second block and a complementary bitline of the first block up to a predetermined voltage, in response to a signal.

Data sensing circuit of semiconductor memory

An input/output sense amplifier circuit of a semiconductor memory device is disclosed which comprises a current sense amplifier, a voltage sense amplifier and a latch circuit. The latch circuit includes a first differential amplifier for receiving the differential signals from the voltage sense amplifier; a second differential amplifier for receiving the differential signals from the voltage sense amplifier; and a gain varying circuit coupled between output terminals of the first and second differential amplifiers and setting a voltage gain of each of the first and second differential amplifiers that varies in response to the latch signal. By this configuration, a time normally required to be provided to the latch signal is obviated, thus reducing lead time of the memory device.

Sense amplifier circuit for use in a semiconductor memory device

A voltage detecting circuit includes a first voltage generator that provides a reference voltage, a second voltage generator that provides a comparison voltage in response to a boosted voltage, and a differential amplifier that provides an amplified difference signal to generate a voltage level detection signal in response to a voltage difference between the reference voltage and the comparison voltage. A bypass circuit is coupled to the amplified signal to detect a target VPP level suitable for a test mode by providing a current path in response to the comparison voltage when the comparison voltage reaches a predetermined level. The voltage detecting circuit thereby allows a precise and stable detecting operation to be performed regardless of the operation mode or process or temperature variations.

Voltage detecting circuit for semiconductor memory device

A semiconductor integrated circuit includes a sense amplifier for amplifying an input signal and an complementary input signal, a full differential amplifier for amplifying the output of the sense amplifier, and a latch for latching the output of the full differential amplifier and outputting the latched output. The full differential amplifier includes a first differential amplifying unit for increasing the voltage of an output port when the level of an input signal input through an input port is larger than the level of an complementary input signal input through an complementary input port and reducing the voltage of the output port when the level of the input signal is lower than the level of the complementary input signal, a second differential amplifying unit for reducing the voltage of an complementary output port when the level of the input signal is larger than the level of the complementary input signal and increasing the voltage of the complementary output port when the level of the input signal is lower than the level of the complementary input signal, and an output voltage level control circuit connected between the output port and the complementary output port. The output voltage level control circuit controls the voltage levels of the output signals output from the output port and the complementary output port. The sense amplifier can stabilize the operation of the latch by reducing the mean voltage level of the output signal even when the supply A voltage increases, can easily control the voltage gain of the full differential amplifier by controlling the resistance, and stably operates at high speed. The current sense amplifier can include resistors associated with PMOS transistors to avoid unstable operation caused by increased transconductance arising from higher operating voltage.

Growing community of inventors

Suwon, South Korea

Jae-yoon Sim