Samsung Electronics Co., Ltd.

Jae-Yeong Do

Sung-Hee Cho

Hyong-Gon Lee

Kang-Deog Suh

Jun-sik Hwangbo

A mask ROM having a defect repairing function stores address signals corresponding to a defective memory cell and then, selectively activates either a redundancy row decoder or a row decoder according to whether the address signals stored are identical to address signals supplied externally. The mask ROM includes first and second memory cell arrays formed by grouping in a word line direction a plurality of read only memory cells arranged in rows and columns; first and second row decoders for combining row address signals supplied externally so as to selectively drive the word lines of the first and second memory cell arrays; and a row decoder selector for storing therein address signals according to a row block including a defective memory cell, of the first memory cell array so as to inactivate the first row decoder and activate the second row decoder when the external row address signals are equal to the address signals stored in the row decoder selector.

Circuit for repairing defective read only memories with redundant NAND

A device for changing a frequency of an internal control clock for testing a chip, by incorporating a mode selection circuit (30) and a high voltage detection circuit (40) in a serial input/output memory. The mode selection circuit (30) is connected between two selected adjacent circuits C.sub.n-2, C.sub.n-1 among a plurality of frequency conversion circuits C.sub.1 . . . C.sub.n, for accessing selectively either a clock pulse CP.sub.n-2 from the frequency conversion circuit C.sub.n-2, arranged in front thereof or a system clock XSK, in dependence upon an internal voltage sense signal IV, IVB. The high voltage detection circuit (40) transmits the internal voltage sense signal to the mode selection circuit (30) by detecting a level of externally applied voltage XV. The internal control clock ICK provided by this device attains a period of T.sub.XSK .times.2.sup.n-M+1, wherein 'M' is a number of the counter receiving the mode selection signals MS, MSB next to the mode selection circuit.

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Kyounggi, South Korea

Jae-Yeong Do