Hyundai Motor Company

Kia Motors Corporation

Skhynix Inc.

Kbautotech Co., Ltd.

Hanon Systems

Kia Corporation

Doowon Climate Control Co., Ltd.

Pamtek Co., Ltd.

Postech Academy-industry Foundation

Halla Visteon Climate Control Corporation

Climate Control Co., Ltd.

Kia Motors Corporation Doowon

Jae Woong Kim

Man Ju Oh

Sang Shin Lee

Jae Woo Park

So La Chung

So Yoon Park

Jae Hoon Kim

Yun Sub Chung

Chang Won Lee

Gum Bae Choi

Du Youl Choi

Chul Min Kim

June Kyu Park

Yong Nam Ahn

Kil Sang Jang

Uk Il Yang

Dong Hoon Oh

Dong Jae Jung

Soo Doo Park

Eun Young Seo

Shin Won Seo

Jung In Park

Choon Gyu Kwon

Jae Hyun Park

Young Jin Kim

In Su Park

Jeong Hwan Kim

Tae Yong Park

Jung Shik Jang

Jung Dal Choi

Tae Soo Sung

Kyu Nam Lim

Sang Hun Kim

Won Suk Lee

Joon Hyung Park

Ki Lyong Jang

Ji Hyun Jang

Ki Seung Bae

Woo Pyo Jeong

Jong Hyun Park

Hyun Wook Shin

Kyung Sub Oh

Hee Tae Kim

Sung Gu Kim

Kilyong Jang

Disclosed is a read operation method of a memory, and the read operation method may include evaluating a sensing node according to a voltage level of a bit line, sensing a voltage level of the sensing node after a first time elapses from a start of the evaluation, and sensing the voltage level of the sensing node after a second time longer than the first time elapses from the start of the evaluation.

Page buffer circuit and read operation method of memory

An embodiment of the present technology includes a memory device and a method of operating the memory device. The memory device includes a memory block, a peripheral circuit configured to increase a threshold voltage of memory cells selected among memory cells included in the memory block according to logic data, detect low-level cells having a threshold voltage higher than a reference voltage among memory cells having a threshold voltage lower than a verify voltage at a first time within a verify time set according the number of bits included into the logic data, and detect high-level cells having a threshold voltage higher than the verify voltage at a second time after the first time, and a control circuit configured to control the peripheral circuit in response to a command.

Memory device and method of operating the memory device

Provided herein is a memory device and a method of operating the memory device. The memory device includes memory cells, a peripheral circuit configured to perform an intermediate program operation and a final program operation on the memory cells, and a program operation controller configured to control the peripheral circuit to perform an extra program operation, after the final program operation is performed, on under programmed cells having threshold voltages, lower than an extra verify voltage lower than a main verify voltage used in the final program operation among the memory cells.

A semiconductor memory device, and a method of operating the same, includes a memory block including a plurality of pages, a read and write circuit configured to apply a first bit line voltage to a selected bit line corresponding to a selected memory cell and apply a second bit line voltage having a potential lower than that of the first bit line voltage to an unselected bit line during detrap operation, a voltage generation circuit configured to generate a first set voltage, a second set voltage, and a pass voltage during the detrap operation, and an address decoder configured to apply the first set voltage to a selected word line corresponding to the selected page and apply the second set voltage having a potential higher than that of the first set voltage to unselected word lines, during the detrap operation.

Semiconductor memory device and method of operating the same including detrap operation for lowering memory cell threshold voltages

There are provided a memory device and an operating method of the memory device. The memory device includes: a memory block including a plurality of pages, each page from the plurality of pages including memory cells, the memory cells configured to be programmed to different program states according to a plurality of target voltages; and a peripheral circuit for performing a program operation of a selected page among the plurality of pages. The peripheral circuit is configured to: decrease at least one target voltage among the plurality of target voltages to a sub-target voltage in the program operation of the selected page; and program memory cells programmed according to the sub-target voltage in the selected page according to a final target voltage corresponding to the sub-target voltage, after a program operation of a page adjacent to the selected page is performed.

Memory device and operating method of the memory device for controlling program operation

An adjustment control device for precise measurement that controls an inspection equipment for inspecting an inspected object to perform precise measurement includes a lowering control unit that lowers the inspection equipment with respect to the inspected object, a rotation control unit that is coupled to the lowering control unit and that controls the lowering control unit to rotate the inspection equipment at a predetermined angle in left and right directions when viewed from a frontal point of view, and a forward and backward control unit that is disposed above the rotation control unit and that transmit a moving force to the rotation control unit to move the inspection equipment forward or forward on the inspected object.

Adjustment control device for precise measurement

A semiconductor memory device includes a channel layer coupled to a bit line, a cell string located along a first side portion of the channel layer, and an auxiliary string located along a second side portion of the same channel layer.

Semiconductor memory device

A memory device including a plurality of memory cells, a peripheral circuit configured to perform a read operation of reading data from memory cells connected to a selected word line, and a read operation controller configured to apply a plurality of read voltages to the selected word line, apply a first pass voltage to unselected word lines while first read voltages for determining a program state of memory cells having a threshold voltage higher than a reference voltage among the plurality of read voltages are applied to the selected word line, and apply a second pass voltage higher than the first pass voltage to the unselected word line while second read voltages for determining a program state of memory cells having a threshold voltage lower than the reference voltage among the plurality of read voltages are applied to the selected word line.

The present discloses provides a memory device and a method of operating the memory device. The memory device includes first main plugs formed in a vertical direction over a substrate and arranged in a first direction, second main plugs, third main plugs arranged between the first and second main plugs, the third main plugs adjacent to the first and second main plugs, and bit lines above the first to third main plugs, wherein each of the first to third main plugs includes first and second sub-plugs facing each other, wherein portions of the first and second sub-plugs included in each of the first and third main plugs are coupled to different select lines, and wherein portions of the first and second sub-plugs included in each of the second and third main plugs are coupled to different select lines.

Memory device storing logical page data and operating method of the memory device

The present technology relates to an electronic device. According to an embodiment of the present disclosure, a memory device may include a plurality of memory cells connected to each word line, a peripheral circuit configured to perform a program operation on memory cells that are connected to a selected word line, and a control logic configured to control the peripheral circuit to perform the program operation on the memory cells that are connected to the selected word line after performing a pre-program operation that increases a threshold voltage of over-erasure cells, among memory cells that are connected to an adjacent word line, having a threshold voltage of an over-erasure state that is lower than a threshold voltage of an erasure state, to the threshold voltage of the erasure state, wherein the adjacent word line is a word line that is next to the selected word line.

Memory device and operating method for performing pre-program operation on over-erasure cells

Provided herein is a memory device that may include a plurality of memory cells coupled to a plurality of bit lines and a common source line. The memory device may also include a control circuit configured to control a peripheral circuit to perform a program operation that includes two or more program steps on selected memory cells of a selected word line. The peripheral circuit may be configured to perform a first program step of the two or more program steps on the selected memory cells, then perform a detrap operation that applies a detrap voltage to the plurality of bit lines and the common source line for a predefined time, and thereafter perform a second program step of the two or more program steps on the selected memory cells.

Memory device and method of operating the memory device including detrapping operations during programming

A camera module inspection system and a method for operating the inspection system. More specifically, the inspection system can quickly check and correct the alignment of the camera module.

Camera module inspection system and method for operating the same

A deep learning-based cooling system temperature prediction apparatus has an artificial neural network modeled by connecting a plurality of artificial neural network submodels each including an input layer, a hidden layer, and an output layer is used. A pump flow speed, a cooling water flow rate, a battery inlet cooling water temperature, a motor inlet cooling water temperature, a radiator outlet cooling water temperature, a battery temperature, and a motor temperature are predicted by inputting at least one of a predetermined control variable, an environment variable, or a time variable to the plurality of artificial neural network submodels in accordance with a physical causality. A number of the plurality of artificial neural network submodels and the control variables or environment variables that are sequentially input to each submodel depend on divisional control and integral control of the cooling system.

Deep learning-based cooling system temperature prediction apparatus according to physical causality and method therefor

An integrated thermal management module for a vehicle may include a chiller; a first reservoir portion through which electric part-cooling water passes, and a second reservoir portion through which high-voltage battery-cooling water passes; a first pump that circulates the electric part-cooling water through an electric portion, and a first valve that controls cooling water that has passed through the chiller or cooling water of the first reservoir portion to be selectively circulated through the electric portion by the first pump; and a second pump that circulates the high-voltage battery-cooling water through a high-voltage battery, and a second valve that controls the cooling water that has passed through the chiller or cooling water of the second reservoir portion to be selectively circulated through the high-voltage battery by the second pump.

Integrated thermal management module for vehicle

An indoor heating line is arranged to pass through a heater core for a coolant heater and indoor air conditioning, and is provided with a first pump so that coolant can flow. A battery heating line is branched from a downstream point of the heater core and connected to an upstream point of the coolant heater after passing through a battery heat exchange part for temperature-raising a high voltage battery, where the battery heating line includes a first heat exchange flow passage that connects a downstream point of the heater core to a first side of the battery heat exchange part, and a second heat exchange flow passage that connects a second side thereof and an upstream point of the coolant heater, where the first heat exchange flow passage and the second heat exchange flow passage are configured to mutually exchange heat.

Heating system of vehicle

Growing community of inventors

Hwaseong-si, South Korea

Jae Woong Kim