Samsung Electronics Co., Ltd.

Jae-Wook Yoo

Dong-Wook Kim

Sin-Wi Moon

Seung-ho Lee

Dae-Hun Jung

Byung-Min Woo

Jang-ho Kim

Jee-Won Kim

Yun-Hyeok Im

Kyoung-sei Choi

Donghan Kim

Hee-Seok Lee

Heung-Kyu Kwon

Yun-seok Choi

Sun-kyoung Seo

Min-Ok Na

Mi-Na Choi

Su-Chang Lee

Hee-jung Hwang

Eun-Seok Cho

Yun-hyeok Im

Hyon-chol Kim

Se-Ran Bae

Eun-seok Cho

Heo-jung Hwang

Television receiver

A stack package includes a lower package including a lower package substrate and a lower semiconductor chip disposed on the lower package substrate, an upper package including an upper package substrate and an upper semiconductor chip disposed on the upper package substrate, a fastening element formed between a top surface of the lower semiconductor chip and a bottom surface of the upper package substrate, and a halogen-free inter-package connector connecting the lower package substrate to the upper package substrate.

Stack packages having fastening element and halogen-free inter-package connector

Provided are a stacked package, method of fabricating a stacked package, and method of mounting a stacked package. A method includes providing an upper semiconductor package including an upper package substrate, upper semiconductor chips formed on a top surface of the upper package substrate, and first solders formed on a bottom surface of the upper package substrate and having a first melting temperature, providing a lower semiconductor package including a lower package substrate, lower semiconductor chips formed on a top surface of the lower package substrate, and solder paste nodes formed on the top surface of the lower package substrate and having a second melting temperature lower than the first melting temperature, and forming inter-package bonding units by attaching respective first solders and solder paste nodes to each other by performing annealing at a temperature higher than the second melting temperature and lower than the first melting temperature.

Stacked package, method of fabricating stacked package, and method of mounting stacked package fabricated by the method

A multi-chip package comprises a semiconductor chip stack structure comprising a semiconductor chip stack including a first semiconductor chip having a first power rating and a second semiconductor chip having a second power rating, the first and second semiconductor chips being stacked one on top of another; and a heat transfer blocking spacer interposed between the first semiconductor chip and the second semiconductor chip.

Multi-chip package with spacer for blocking interchip heat transfer

Growing community of inventors

Suwon-si, South Korea

Jae-Wook Yoo