Skhynix Inc.

Jae Woo Song

Young Sub Yuk

A semiconductor chip includes a detection circuit configured to generate a discharge signal that is enabled when a voltage level of an external voltage is greater than a first set level and configured to generate a voltage control signal that is enabled when an output voltage is generated to have a voltage level of a ground voltage in a test mode, a charge discharge circuit configured to discharge charges of an output node that is included in a driving circuit when the discharge signal is enabled, and the driving circuit configured to generate the output voltage the voltage level of which rises up to a second set level by supplying charges from the external voltage to the output node in response to a driving signal a voltage level of which is decreased during an interval in which the voltage control signal is enabled.

Growing community of inventors

Icheon-si, South Korea

Jae Woo Song