Samsung Electronics Co., Ltd.

Skhynix Inc.

Jae-Woo Park

Sang-Wan Nam

Donghyuk Chae

Chi Weon Yoon

Jung-No Im

Jae-Yong Jeong

Dae-seok Byeon

Sang-Hyun Joo

Bo-Geun Kim

Sung Soo Lee

Ohsuk Kwon

Jinwoo Cho

Ki Hwan Choi

Ju-Hwan Lee

Jae-Won Cha

Hyung-chan Kim

Hongseok Kim

Bong-soon Lim

Ui-Yoon Lee

A compressor including a housing, and a motor including a stator to be interference fitted into and fixed to an inner circumferential surface of the housing and a rotor rotatable inside the stator. The stator includes an annular back yoke disposed inside the housing, a plurality of teeth extending radially inward from the back yoke, and a coil wound on the plurality of teeth. The back yoke includes a deformation portion compressed and deformed by the housing while the stator is interference fitted into the inner circumferential surface of the housing, a contact portion which protrudes radially outward from the deformation portion and being in contact with the housing, and a cavity formed on a radial inner side of the deformation portion into which the deformation portion is deformed.

Motor and compressor including the same

A method of operating a non-volatile memory device includes performing an erasing operation to memory cells associated with a plurality of string selection lines (SSLs), the memory cells associated with the plurality of SSLs constituting a memory block, and verifying the erasing operation to second memory cells associated with a second SSL after verifying the erasing operation to first memory cells associated with a first SSL.

Nonvolatile memory device, operating method thereof and memory system including the same

An error correction circuit includes: a failure detection unit suitable for detecting failed data among a plurality of data; a data output control unit suitable for selectively outputting test data corresponding to a predetermined amount of data excluding the failed data; and an error correction unit suitable for performing a unit ECC operation on the test data.

Error correction circuit and semiconductor memory device including the same

A nonvolatile memory device and a method of operating the same are provided. The method includes performing a plurality of program operations on a plurality of memory cells each to be programmed to one of a plurality of program states, performing a program-verify operation on programmed memory cells associated with each of the plurality of program states, the program-verify operation comprises, selecting one of the plurality of offsets based on a noise level of a common source line associated with a programmed memory cell, using the selected offset to select one of a first verify voltage and a second verify voltage higher than the first verify voltage, and verifying a program state of the programmed memory cell using the first verify voltage and the second verify voltage.

Nonvolatile memory device, method of operating the same and electronic device including the same

A method is provided for operating a memory system. The method includes reading nonvolatile memory cells using a first soft read voltage, a voltage level difference between the first soft read voltage and a first hard read voltage being indicated by a first voltage value; and reading the nonvolatile memory cells using a second soft read voltage paired with the first soft read voltage, a voltage level difference between the second soft read voltage and the first hard read voltage being indicated by a second voltage value. The second voltage value is different than the first voltage value. Also, a difference between the first voltage value and the second voltage value corresponds to the degree of asymmetry of adjacent threshold voltage distributions among multiple threshold voltage distributions set for the nonvolatile memory cells of the memory system.

Memory system and method of operating memory system using soft read voltages

A nonvolatile memory device programs a memory cell by performing a plurality of program loops each comprising a program operation and a program verifying operation. Where the program verifying operation in one program loop determines that the memory cell has been successfully programmed to a target state, a soft-programming operation is performed in a subsequent program loop to determine whether the memory cell has retained the target state, and if not, increases the threshold voltage of the memory cell.

Nonvolatile memory device and related programming method

A programming method for a nonvolatile memory device includes performing a LSB programming operation programming all LSB logical pages, and thereafter performing a MSB programming operation programming all MSB logical pages, wherein during the LSB programming operation a selected MLC is programmed to a negative intermediate program state. A program sequence for the LSB and MSB programming operations may be sequential or non-sequential in relation to an order arranged of word lines.

Flash memory device and system with program sequencer, and programming method

A method of reading a nonvolatile memory device comprises sensing data stored in memory cells adjacent to selected memory cells to identify adjacent aggressor cells, and performing separate precharge operations on bitlines connected to selected memory cells having adjacent aggressor cells and on bitlines connected to selected memory cells having adjacent non-aggressor cells.

Nonvolatile memory device and method of reading same

Provided are a non-volatile memory device in which time required for programming may be saved, and a method of driving the same. The non-volatile memory device may include a memory cell array with a plurality of memory cells; an input/output buffer having a storage unit that stores data and indicator bits representing information regarding the data; a data scanning unit that receives the stored data from the input/output buffer in units of scanning, and that scans the received data, the received data being selectively programmed in the memory cells according to a result of scanning the data; and/or a control logic unit that controls the data stored in the input/output buffer in units of scanning to be selectively supplied to the data scanning unit based on the states of the indicator bits.

Non-volatile memory device reducing data programming and verification time, and method of driving the same

There is provided a SIM (Subscriber Identity Module)/UIM (User Identity Module) card arrangement in a slide type portable wireless terminal having a main body and a slide body sliding by a predetermined length in a lengthwise direction of the terminal to slide up and down on the main body. In the arrangement, when the slide body is fully slid up, a SIM (Subscriber Identity Module)/UIM (User Identity Module) card is installed on a rear surface, which is open to the view, of the slide body.

SIM/UIM card arrangement in portable wireless terminal

Memory cells in a memory cell array are erased using an erase operation followed by a post-program operation. In the erase operation, an erase voltage is applied to a plurality of memory cells of the memory cell array. In the post program operation, a program voltage is simultaneously applied to at least two word lines coupled to ones of the plurality of erased memory cells of the memory cell array. Related devices are also discussed.

Growing community of inventors

Suwon-si, South Korea

Jae-Woo Park