Hynix Semiconductor Inc.

Skhynix Inc.

Jae-Sung Roh

Deok-Sin Kil

Han-Sang Song

Jin-Hyock Kim

Seung-Jin Yeom

Kee-Jeung Lee

Ki-Seon Park

Young-Dae Kim

Kwan-Woo Do

Kyung-Woong Park

Hyun-Chul Sohn

Jae-Geun Oh

Jeong-Yeop Lee

Sun-Hwan Hwang

Jin-Ku Lee

A method for fabricating a capacitor includes: forming a storage node contact plug over a substrate; forming an insulation layer having an opening exposing a surface of the storage node contact plug over the storage contact plug; forming a conductive layer for a storage node over the insulation layer and the exposed surface of the storage node contact plug through two steps performed at different temperatures; performing an isolation process to isolate parts of the conductive layer; and sequentially forming a dielectric layer and a plate electrode over the isolated conductive layer.

Method for fabricating capacitor

A capacitor includes a lower electrode, a dielectric layer, an upper electrode, and a ruthenium oxide layer. At least one of the lower electrode and the upper electrode is formed of a ruthenium layer, and the ruthenium oxide layer is disposed next to the ruthenium layer.

Semiconductor device and method for fabricating the same

A semiconductor device, and a method of fabricating the semiconductor device, which is able to prevent a leaning phenomenon from occurring between the adjacent storage nodes. The method includes forming a plurality of multi-layered pillar type storage nodes each of which is buried in a plurality of mold layers, wherein the uppermost layers of the multi-layered pillar type storage nodes are fixed by a support layer, etching a portion of the support layer to form an opening, and supplying an etch solution through the opening to remove the multiple mold layers. A process of depositing and etching the mold layer by performing the process 2 or more times to form the multi-layered pillar type storage node. Thus, the desired capacitance is sufficiently secured and the leaning phenomenon is avoided between adjacent storage nodes.

Semiconductor device and method of fabricating the same

A semiconductor device includes a semiconductor substrate, an insulation pattern on the semiconductor substrate, and an etch stop layer on the insulating pattern, the insulation pattern and the etch stop layer defining a contact hole that exposes the substrate, a first plug filled in a portion of the contact hole, a diffusion barrier layer formed above the first plug and in a bottom portion and on sidewalls of a remaining portion of the contact hole, a second plug fainted on the diffusion barrier layer and filled in the contact hole, and a storage node coupled to and formed on the second plug.

Semiconductor device including ruthenium electrode and method for fabricating the same

A method for fabricating a capacitor includes forming an isolation layer over a cell region and a peripheral region of a substrate. The isolation layer forms a plurality of open regions in the cell region. Storage nodes are formed on surfaces of the open regions. A sacrificial pattern is formed over the isolation layer and covers the cell region. The isolation layer is etched in the peripheral region to expose side portions of the resulting structure obtained after forming the sacrificial pattern in the cell region. With the sacrificial pattern supporting the storage nodes, the isolation layer in the cell region is removed. The sacrificial pattern is then removed.

Method for fabricating a capacitor utilizes the sacrificial pattern covering the cell region

A method for fabricating a capacitor includes forming an isolation layer over a cell region and a peripheral region of a substrate. The isolation layer forms a plurality of open regions in the cell region. Storage nodes are formed on surfaces of the open regions. An upper portion of the isolation layer is etched to expose upper outer walls of the storage nodes. A sacrificial pattern is formed over the isolation layer to enclose the upper outer walls of the storage nodes. The isolation layer in the peripheral region is etched to expose side portions of the resulting structure obtained after forming the sacrificial pattern in the cell region. With the sacrificial pattern supporting the storage nodes, the isolation layer in the cell region is removed. The sacrificial pattern is then removed.

Method for fabricating capacitor utilizes a sacrificial pattern enclosing the upper outer walls of the storage nodes

A method for fabricating a capacitor includes forming a sacrificial layer having a plurality of trenches on an upper portion of a substrate, forming storage nodes in the trenches, exposing upper portions of the storage nodes by removing a portion of the sacrificial layer, forming supporters to support the exposed upper portions of the storage nodes, removing the sacrificial layer under the supporters, and removing the supporters.

A method for fabricating a capacitor includes forming an isolation layer over a substrate. The isolation layer forms a plurality of open regions. Storage nodes are formed on surfaces of the open regions. An upper portion of the isolation layer is etched to expose upper outer walls of the storage nodes. A sacrificial layer is formed over the isolation layer to enclose the upper outer walls of the storage nodes. The isolation layer and the sacrificial layer are then removed.

Method for fabricating a cylinder-type capacitor utilizing a connected ring structure

A plasma doping method includes providing a doping source over a substrate. The doping source includes dopants that are to be injected into the substrate. At least two different bias voltages are applied to inject the dopants from the doping source to the substrate.

Plasma doping method and method for fabricating semiconductor device using the same

A capacitor includes a lower electrode, a dielectric structure over the lower electrode, the dielectric structure including at least one crystallized zirconium oxide (ZrO) layer and at least one amorphous aluminum oxide (AlO) layer, and an upper electrode formed over the dielectric structure. A method for fabricating a capacitor includes forming a lower electrode over a certain structure, forming a dielectric structure including at least one crystallized zirconium oxide (ZrO) layer and at least one amorphous aluminum oxide (AlO) layer over the lower electrode, and forming an upper electrode over the dielectric structure.

Capacitor and method for fabricating the same

A method for fabricating a capacitor includes providing a substrate having a capacitor region is employed, forming a first RuOlayer over the substrate, forming a Ru layer for a lower electrode over the first RuOlayer and deoxidizing the first RuOlayer, forming a dielectric layer over the Ru layer for a lower electrode, and forming a conductive layer for an upper electrode over the dielectric layer, wherein the first RuOlayer contains oxygen in an amount less than an oxygen amount of a RuOlayer.

Method for fabricating capacitor in semiconductor device

A semiconductor device with a dielectric structure and a method for fabricating the same are provided. A capacitor in the semiconductor device includes: a bottom electrode formed on a substrate; a first dielectric layer made of titanium dioxide (TiO) in rutile phase and formed on the bottom electrode; and an upper electrode formed on the first dielectric layer.

Semiconductor device with dielectric structure and method for fabricating the same

A semiconductor device includes a semiconductor substrate, an insulation pattern on the semiconductor substrate, and an etch stop layer on the insulating pattern, the insulation pattern and the etch stop layer defining a contact hole that exposes the substrate, a first plug filled in a portion of the contact hole, a diffusion barrier layer formed above the first plug and in a bottom portion and on sidewalls of a remaining portion of the contact hole, a second plug formed on the diffusion barrier layer and filled in the contact hole, and a storage node coupled to and formed on the second plug.

A method for forming a zirconium oxide (ZrO) layer on a substrate in a chamber includes controlling a temperature of the substrate; and repeating a unit cycle of an atomic layer deposition (ALD) method. The unit cycle includes supplying a zirconium (Zr) source into a chamber, parts of the Zr source being adsorbed into a surface of the substrate; purging non-adsorbed parts of the Zr source remaining inside the chamber; supplying a reaction gas for reacting with the adsorbed parts of the Zr source; and purging non-reacted parts of the reaction gas remaining inside the chamber and reaction byproducts, wherein the temperature of the substrate and a concentration of the reaction gas are controlled such that the ZrOlayer is formed with a tetragonal structure.

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Ichon-shi, South Korea

Jae-Sung Roh