Hynix Semiconductor Inc.

Hyundai Electronics Industries Co. Ltd.

Jae Seon Yu

Jeong Ho Kim

Jae Kyun Lee

Kwang Kee Chae

A semiconductor device includes a semiconductor substrate with an isolation layer formed in the semiconductor substrate to delimit active regions. Recess patterns for gates are defined in the active regions and the isolation layer. Gate patterns are formed in and over the recess patterns for gates, and a gate spacer is formed to cover the gate patterns. The recess patterns for gates have a first depth in the active regions and a second depth, which is greater than the first depth, in the isolation layer. Gaps are created between the gate patterns and upper parts of the recess patterns for gates that are defined in the isolation layer. The gate spacer fills the gaps and protects the gate spacer so as to prevent bridging.

Semiconductor device having saddle fin-shaped channel and method for manufacturing the same

A method for manufacturing a semiconductor device is disclosed. In a method for forming a contact plug according to a high integration of a semiconductor device, the method for manufacturing a semiconductor device leaves a low dielectric insulating film as a release film in a bit line contact and a storage electrode contact region of an upper semiconductor substrate where a MOSFET is provided, forms a contact plug which buries a spacing between the bit line contact and the storage electrode contact region, forms a contact plug without damaging a lower layer by removing the release layer, and solves a misalignment problem that occurs during a photolithography process and solves a problem in obtaining a contact area by a slope etching profile that occurs during the etching process, thereby providing an improved process margin.

Manufacturing method for semiconductor device

The present invention discloses a method for fabricating a semiconductor device. A protective film for protecting a device isolation film is formed on the device isolation film for the contact hole formation process, thereby preventing a device isolation film from being damaged due to misalignment in a lithography process or overetch during the etch process. Accordingly, gate induced drain leakage current is not generated, contact junction leakage current is reduced, and the contact properties are improved. Improvements in the contact properties produce corresponding improvements in the properties and yield of the semiconductor devices manufactured according to the invention.

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Kyoungki-do, South Korea

Jae Seon Yu