Samsung Electronics Co., Ltd.

Industry-University Cooperation Foundation Hanyang University

Jae Seok Hur

Min Hee Cho

Sungwon Yoo

Wonsok Lee

Jae Kyeong Jeong

Min Tae Ryu

Hyeon Joo Seul

Provided is a semiconductor memory device comprising a bit line extending in a first direction, a channel pattern on the bit line and including a first oxide semiconductor layer in contact with the bit line and a second oxide semiconductor layer on the first oxide semiconductor layer, wherein each of the first and second oxide semiconductor layers includes a horizontal part parallel to the bit line and first and second vertical parts that vertically protrude from the horizontal part, first and second word lines between the first and second vertical parts of the second oxide semiconductor layer and on the horizontal part of the second oxide semiconductor layer, and a gate dielectric pattern between the channel pattern and the first and second word lines. A thickness of the second oxide semiconductor layer is greater than that of the first oxide semiconductor layer.

Semiconductor memory device having a confinement layer with a two-dimensional electron gas in the confinement layer

Growing community of inventors

Seoul, South Korea

Jae Seok Hur