International Business Machines Corporation

Jae M Park

Richard R Thomas

Jonathan David Reid

Charles Robert Davis

Jungihl Kim

James R Loomis

Young-Ho Kim

Thomas M Shaw

Richard Hsiao

George Frederick Walker

Emanuel Israel Cooper

Shaji Farooq

Sarah Huffsmith Knickerbocker

Robert Anthony Rita

Rao Venkateswara Vallabhaneni

Peter Richard Duncombe

Robert R Shaw

Mark O Neisser

Ekkehard F Miersch

Farid Youssif Aoude

James R White

Edward A Giess

Susan A Hodgson

Friedel Muller-Landau

Jon A Van Hise

James M Brownlow, Deceased

Voya Rista Markovich

Marie Angelopoulos

Wu-Song S Huang

Da-Yuan Shih

Stephen L Buchwalter

Charles Hampton Perry

Steven G Barbee

David W Wang

Bernd Karl Appelt

Leena Paivikki Buchwalter

Ronald Dean Goldblatt

Perminder S Bindra

Caroline A Kovac

Eugene R Skarvinko

Ashit A Mehta

Robert Daniel Edwards

Dae Young Jung

John E Heidenreich, Iii

Scott G Ehrenberg

Hung-Chang W Huang

Sharon L Nunes

Thomas Carl Clarke

Donald J Hunt

Janet L Poetzinger

L Wynn Herron

Luis M Ferreiro, Deceased

Domenico Tortorella

Lisa J Smith

A method is disclosed of simultaneously laminating circuitized dielectric layers to form a multilayer high performance circuit board and making interlevel electrical connections. The method selects two elements which will form a eutectic at one low temperature and will solidify to form an alloy which will only remelt at a second temperature higher than any required by any subsequent lamination. The joint is made using a transient liquid bonding technique and sufficient Au and Sn to result in a Au--Sn20wt% eutectic at the low temperature. Once solidified, the alloy formed remains solid throughout subsequent laminations. As a result, a composite, mulilayer, high performance circuit board is produced, electrically joined at selected lands by the solid alloy.

Au-Sn transient liquid bonding in high performance laminates

A process is disclosed for producing a metal-organic polymer combination by contacting the polymer with a plasma followed by an aqueous solution of a metal salt. In one embodiment a water or nitrous oxide plasma is used to treat a polyimide or a fluorinated polymer. The polymer is combined with a metal cation, the metal being a catalyst for a conventional electroless coating after which it is contacted with an electroless metal plating bath for the formation of electrical circuits and especially for plating high aspect ratio vias in microcircuits. Unlike the conventional electroless process, the cationic catalytic metal is not reduced to a zero valent metal catalyst prior to the application of the electroless metal coating solution. The process also improves the wettability of the polymer, especially the fluorinated polymer and is especially useful in improving the wettability of high aspect ratio vias.

Process for producing a metal organic polymer combination

Improved vie-filling compositions for producing conductive vias in circuitized ceramic substrates, particularly multi-layer substrates, without cracking and/or loss of hermetic sealing. The via-filling compositions comprise pastes containing a mixture of (a) ceramic and/or glass spheres of substantially- uniform diameter between about 0.5 and 6 .mu.m, (b) conductive metal particles or spheres having a maximum dimension or diameter between about 1/3 and 1/4 of the diameter of the ceramic and/or glass spheres, and (c) a binder vehicle. The formed conductive via bodies comprise a uniform conductive skeletal network of sintered metal particles densely packed within a uniform matrix of the co-sintered ceramic and/or glass spheres, which matrix is hermetically fused and integrated with ceramic layers forming the wall of the via in the ceramic circuit substrate.

Process for producing ceramic circuit structures having conductive vias

A process for fabricating a printed circuit board concerns the use of a soluble, air-stable conducting polymer applied to plated through holes, blind holes or vias or to a predetermined portion of the printed circuit board surface for selectively metal plating on the polymer without the necessity of either an electroless plating bath or the use of precious metal seeds. A preferred conducting polymer is polyaniline. A preferred metal plating is preferably copper or a noble metal such as palladium or silver.

Fabrication of printed circuit boards using conducting polymer

Improved via-filling compositions for producing conductive vias in circuitized ceramic substrates, particularly multilayer substrates, without cracking and/or loss of hermetic sealing. The via-filling compositions comprise pastes containing a mixture of (a) ceramic and/or glass spheres of substantially- uniform diameter between about 0.5 and 6 .mu.m, (b) conductive metal particles or spheres having a maximum dimension or diameter between about 1/3 and 1/4 of the diameter of the ceramic and/or glass spheres, and (c) a binder vehicle. The formed conductive via bodies comprise a uniform conductive skeletal network of sintered metal particles densely packed within a uniform matrix of the co-sintered ceramic and/or glass spheres, which matrix is hermetically fused and integrated with ceramic layers forming the wall of the via in the ceramic circuit substrate.

Via paste compositions and use thereof to form conductive vias in

A method is disclosed of simultaneously laminating circuitized dielectric layers to form a multilayer high performance circuit board and making interlevel electrical connections. The method selects two elements which will form a eutectic at one low temperature and will solidify to form an alloy which will only remelt at a second temperature higher than any required by any subsequent lamination. The joint is made using a transient liquid bonding technique and sufficient Au and Sn to result in a Au-Sn20wt% eutectic at the low temperature. Once solidified, the alloy formed remains solid throughout subsequent laminations. As a result, a composite, multilayer, high performance circuit board is produced, electrically joined at selected lands by the solid alloy.

A multilayer, three-dimensional wiring matrix is fabricated from a plurality of individually testable plane pair sub-units (30). Each of the plane pair sub-units (30) includes a compensator (20) with capping layers (32) laminated on either side. The compensator (20) has a dielectric (14) encapsulated foil (10) which has been patterned with holes (12). Metallization patterns on the surfaces of the compensator (20) provide orthogonal wiring (22), electrical connections (24) to the foil (10), and electrical connections (26) between the top and bottom surfaces. The capping layer (32) includes joining metallurgy (38) at selected locations within a dielectric layer (36) that is in registry with the metallization in the vias (16). The joining metallurgy (38) may be a metal loaded thermoplastic and provides a seal for the vias (16) as well as planarizes the structure. The capping layers (32) may be formed in-situ on the compensator or separately.

Discrete fabrication of multi-layer thin film, wiring structures

A pattern is formed on a substrate by providing on the substrate a dielectric composition; defining a pattern in said dielectric; depositing metal and then micromachining the metal to provide the desired pattern on the substrate.

Forming a pattern on a substrate

Fluorinated polymeric composition exhibiting low dielectric constant and a low coefficient of thermal expansion containing a fluorinated polymeric material and a silica and/or quartz filler having a mean particle size of no greater than 7 microns, and use thereof to form a substrate having vias therein. Layers of the above composition are obtained by applying the composition to a substrate and then heating the composition to a temperature sufficient to cause the composition to fuse.

Fluorinated polymeric composition, fabrication thereof and use thereof

A reaction product of a .beta.-diketone and a polymer having groups that are reactive with the .beta.-diketone can be complexed with a metal. The reaction product having the complex metal can be activated to provide a substrate suitable for plating from an electroless metal plating bath.

Substrate of metal-complexed beta-diketone/thermosetting polymer

Substantially nonconductive or semiconductive surfaces of through holes can be electroplated directly, without an intervening non-electrolytic metallization, by a stepwise process which includes the application to the through holes of a polyelectrolyte surfactant in solution in combination with the application of a conductive metal containing material.

Direct electroplating of through holes

A process for preparing a substrate, e.g., an epoxy printed circuit board, for subsequent metallization. Active chemical sites are formed adhering to the substrate surface. The substrate is then exposed to a vapor of a volatile organometallic compound, which chemically reacts with the active sites and is decomposed to at least a species of the metal constituent of the compound. This species adheres to the substrate and can be transformed into the free metal which is useful as a seed for subsequent electroless deposition of a metal thereon. If selective deposition is desired, a resist masking layer is used prior to forming the seed layer. Volatile organopalladium compounds, such as (cyclopentadienyl)(allyl)palladium and bis(allyl)pallidium, are particularly effective for depositing a palladium seed which is particularly effective for electroless deposition of copper.

Method for preparing substrates for deposition of metal seed from an

.beta.-diketone-polymer reaction product

Strengthened ceramic and a method for increasing the mechanical strength of fully sintered ceramic articles, in particular alumina type ceramic and glass-ceramic articles. Such articles are strengthened by forming a compresssive material layer of amorphous silicon dioxide or refractory metal nitride on the surface of the article to be strengthened.

Strengthening a ceramic by post sinter coating with a compressive

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Somers, NY, United States of America

Jae M Park